From: Huacai Chen <chenhc@lemote.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: kvm@vger.kernel.org, "Huacai Chen" <chenhuacai@gmail.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
qemu-devel@nongnu.org,
"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
stable@vger.kernel.org, "Fuxin Zhang" <zhangfx@lemote.com>,
"Huacai Chen" <chenhc@lemote.com>,
linux-mips@vger.kernel.org, "Xing Li" <lixing@loongson.cn>
Subject: [PATCH V3 01/14] KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data)
Date: Sun, 3 May 2020 18:05:54 +0800 [thread overview]
Message-ID: <1588500367-1056-2-git-send-email-chenhc@lemote.com> (raw)
In-Reply-To: <1588500367-1056-1-git-send-email-chenhc@lemote.com>
From: Xing Li <lixing@loongson.cn>
The code in decode_config4() of arch/mips/kernel/cpu-probe.c
asid_mask = MIPS_ENTRYHI_ASID;
if (config4 & MIPS_CONF4_AE)
asid_mask |= MIPS_ENTRYHI_ASIDX;
set_cpu_asid_mask(c, asid_mask);
set asid_mask to cpuinfo->asid_mask.
So in order to support variable ASID_MASK, KVM_ENTRYHI_ASID should also
be changed to cpu_asid_mask(&boot_cpu_data).
Cc: stable@vger.kernel.org
Signed-off-by: Xing Li <lixing@loongson.cn>
[Huacai: Change current_cpu_data to boot_cpu_data for optimization]
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/include/asm/kvm_host.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index 2c343c3..a01cee9 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -275,7 +275,7 @@ enum emulation_result {
#define MIPS3_PG_FRAME 0x3fffffc0
#define VPN2_MASK 0xffffe000
-#define KVM_ENTRYHI_ASID MIPS_ENTRYHI_ASID
+#define KVM_ENTRYHI_ASID cpu_asid_mask(&boot_cpu_data)
#define TLB_IS_GLOBAL(x) ((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G)
#define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK)
#define TLB_ASID(x) ((x).tlb_hi & KVM_ENTRYHI_ASID)
--
2.7.0
next prev parent reply other threads:[~2020-05-03 10:08 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-03 10:05 [PATCH V3 00/14] KVM: MIPS: Add Loongson-3 support (Host Side) Huacai Chen
2020-05-03 10:05 ` Huacai Chen [this message]
2020-05-06 23:42 ` [PATCH V3 01/14] KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data) Sasha Levin
2020-05-07 12:10 ` Aleksandar Markovic
2020-05-08 10:05 ` Aleksandar Markovic
2020-05-03 10:05 ` [PATCH V3 02/14] KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vmbits Huacai Chen
2020-05-08 10:14 ` Aleksandar Markovic
2020-05-03 10:05 ` [PATCH V3 03/14] KVM: MIPS: Increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16 Huacai Chen
2020-05-08 10:16 ` Aleksandar Markovic
2020-05-03 10:05 ` [PATCH V3 04/14] KVM: MIPS: Add EVENTFD support which is needed by VHOST Huacai Chen
2020-05-08 9:08 ` Aleksandar Markovic
2020-05-08 10:08 ` Aleksandar Markovic
2020-05-03 10:05 ` [PATCH V3 05/14] KVM: MIPS: Use lddir/ldpte instructions to lookup gpa_mm.pgd Huacai Chen
2020-05-08 10:46 ` Aleksandar Markovic
2020-05-03 10:05 ` [PATCH V3 06/14] KVM: MIPS: Introduce and use cpu_guest_has_ldpte Huacai Chen
2020-05-08 10:49 ` Aleksandar Markovic
2020-05-03 10:06 ` [PATCH V3 07/14] KVM: MIPS: Use root tlb to control guest's CCA for Loongson-3 Huacai Chen
2020-05-08 10:53 ` Aleksandar Markovic
2020-05-03 10:06 ` [PATCH V3 08/14] KVM: MIPS: Let indexed cacheops cause guest exit on Loongson-3 Huacai Chen
2020-05-08 10:55 ` Aleksandar Markovic
2020-05-03 10:06 ` [PATCH V3 09/14] KVM: MIPS: Add more types of virtual interrupts Huacai Chen
2020-05-08 11:47 ` Aleksandar Markovic
2020-05-03 10:06 ` [PATCH V3 10/14] KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support Huacai Chen
2020-05-08 11:22 ` Aleksandar Markovic
2020-05-09 7:58 ` Huacai Chen
2020-05-03 10:06 ` [PATCH V3 11/14] KVM: MIPS: Add CPUCFG emulation for Loongson-3 Huacai Chen
2020-05-03 10:06 ` [PATCH V3 12/14] KVM: MIPS: Add CONFIG6 and DIAG registers emulation Huacai Chen
2020-05-03 10:06 ` [PATCH V3 13/14] KVM: MIPS: Add more MMIO load/store instructions emulation Huacai Chen
2020-05-08 11:46 ` Aleksandar Markovic
2020-05-03 10:06 ` [PATCH V3 14/14] KVM: MIPS: Enable KVM support for Loongson-3 Huacai Chen
2020-05-08 11:43 ` [PATCH V3 00/14] KVM: MIPS: Add Loongson-3 support (Host Side) Aleksandar Markovic
2020-05-09 4:32 ` Huacai Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1588500367-1056-2-git-send-email-chenhc@lemote.com \
--to=chenhc@lemote.com \
--cc=aleksandar.qemu.devel@gmail.com \
--cc=chenhuacai@gmail.com \
--cc=f4bug@amsat.org \
--cc=jiaxun.yang@flygoat.com \
--cc=kvm@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=lixing@loongson.cn \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=stable@vger.kernel.org \
--cc=tsbogend@alpha.franken.de \
--cc=zhangfx@lemote.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).