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Mon, 11 May 2020 10:05:52 -0700 Received: from [172.19.2.32] (helo=xsjkomlodi50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jYBsF-0004PW-P7; Mon, 11 May 2020 10:05:51 -0700 From: Joe Komlodi To: qemu-devel@nongnu.org Subject: [PATCH v1 1/4] target/microblaze: gdb: Add dynamic GDB XML register support Date: Mon, 11 May 2020 10:05:48 -0700 Message-Id: <1589216751-106038-2-git-send-email-komlodi@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1589216751-106038-1-git-send-email-komlodi@xilinx.com> References: <1589216751-106038-1-git-send-email-komlodi@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(376002)(136003)(396003)(346002)(39860400002)(46966005)(33430700001)(6666004)(336012)(44832011)(316002)(36756003)(33440700001)(82310400002)(2906002)(2616005)(426003)(86362001)(356005)(107886003)(478600001)(70206006)(81166007)(70586007)(6916009)(7696005)(82740400003)(8676002)(8936002)(186003)(9786002)(47076004)(26005)(5660300002)(4326008); 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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB7047 Received-SPF: pass client-ip=40.107.94.73; envelope-from=komlodi@xilinx.com; helo=NAM10-MW2-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/11 13:20:59 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add dynamic GDB register XML for Microblaze, and modify the config file to use XML when building for Microblaze. For the dynamic XML to be read, there still needs to be a core XML file. Signed-off-by: Joe Komlodi --- configure | 1 + target/microblaze/cpu.c | 4 ++ target/microblaze/cpu.h | 9 ++++ target/microblaze/gdbstub.c | 123 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 137 insertions(+) diff --git a/configure b/configure index 0d69c36..5a099b6 100755 --- a/configure +++ b/configure @@ -7832,6 +7832,7 @@ case "$target_name" in TARGET_ARCH=microblaze TARGET_SYSTBL_ABI=common bflt="yes" + gdb_xml_files="microblaze-core.xml" echo "TARGET_ABI32=y" >> $config_target_mak ;; mips|mipsel) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index aa99830..41cac1b 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -226,6 +226,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) env->pvr.regs[11] = (cpu->cfg.use_mmu ? PVR11_USE_MMU : 0) | 16 << 17; + mb_gen_dynamic_xml(cpu); + mcc->parent_realize(dev, errp); } @@ -330,6 +332,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) dc->vmsd = &vmstate_mb_cpu; device_class_set_props(dc, mb_properties); cc->gdb_num_core_regs = 32 + 5; + cc->gdb_get_dynamic_xml = mb_gdb_get_dynamic_xml; + cc->gdb_core_xml_file = "microblaze-core.xml"; cc->disas_set_info = mb_disas_set_info; cc->tcg_initialize = mb_tcg_init; diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index a31134b..074a18e 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -25,6 +25,8 @@ #include "fpu/softfloat-types.h" typedef struct CPUMBState CPUMBState; +typedef struct DynamicMBGDBXMLInfo DynamicMBGDBXMLInfo; + #if !defined(CONFIG_USER_ONLY) #include "mmu.h" #endif @@ -272,6 +274,10 @@ struct CPUMBState { } pvr; }; +struct DynamicMBGDBXMLInfo { + char *xml; +}; + /** * MicroBlazeCPU: * @env: #CPUMBState @@ -286,6 +292,7 @@ struct MicroBlazeCPU { CPUNegativeOffsetState neg; CPUMBState env; + DynamicMBGDBXMLInfo dyn_xml; /* Microblaze Configuration Settings */ struct { @@ -321,6 +328,8 @@ void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +void mb_gen_dynamic_xml(MicroBlazeCPU *cpu); +const char *mb_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname); void mb_tcg_init(void); /* you can call this signal handler from your SIGBUS and SIGSEGV diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index f41ebf1..cdca434 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -54,3 +54,126 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) } return 4; } + +static void mb_gen_xml_reg_tag(const MicroBlazeCPU *cpu, GString *s, + const char *name, uint8_t bitsize, + const char *type) +{ + g_string_append_printf(s, "\n"); +} + +static uint8_t mb_cpu_sreg_size(const MicroBlazeCPU *cpu, uint8_t index) +{ + /* + * NOTE: mb-gdb will refuse to connect if we say registers are + * larger then 32-bits. + * For now, say none of our registers are dynamically sized, and are + * therefore only 32-bits. + */ + + return 32; +} + +static void mb_gen_xml_reg_tags(const MicroBlazeCPU *cpu, GString *s) +{ + uint8_t i; + const char *type; + char reg_name[4]; + bool has_hw_exception = cpu->cfg.dopb_bus_exception || + cpu->cfg.iopb_bus_exception || + cpu->cfg.illegal_opcode_exception || + cpu->cfg.opcode_0_illegal || + cpu->cfg.div_zero_exception || + cpu->cfg.unaligned_exceptions; + + static const char *reg_types[32] = { + [1] = "data_ptr", + [14] = "code_ptr", + [15] = "code_ptr", + [16] = "code_ptr", + [17] = "code_ptr" + }; + + for (i = 0; i < 32; ++i) { + type = reg_types[i]; + /* r17 only has a code_ptr tag if we have HW exceptions */ + if (i == 17 && !has_hw_exception) { + type = NULL; + } + + sprintf(reg_name, "r%d", i); + mb_gen_xml_reg_tag(cpu, s, reg_name, 32, type); + } +} + +static void mb_gen_xml_sreg_tags(const MicroBlazeCPU *cpu, GString *s) +{ + uint8_t i; + + static const char *sreg_names[] = { + "rpc", + "rmsr", + "rear", + "resr", + "rfsr", + "rbtr", + "rpvr0", + "rpvr1", + "rpvr2", + "rpvr3", + "rpvr4", + "rpvr5", + "rpvr6", + "rpvr7", + "rpvr8", + "rpvr9", + "rpvr10", + "rpvr11", + "redr", + "rpid", + "rzpr", + "rtlblo", + "rtlbhi", + "rtlbx", + "rtlbsx", + "rslr", + "rshr" + }; + + static const char *sreg_types[ARRAY_SIZE(sreg_names)] = { + [SR_PC] = "code_ptr" + }; + + for (i = 0; i < ARRAY_SIZE(sreg_names); ++i) { + mb_gen_xml_reg_tag(cpu, s, sreg_names[i], mb_cpu_sreg_size(cpu, i), + sreg_types[i]); + } +} + +void mb_gen_dynamic_xml(MicroBlazeCPU *cpu) +{ + GString *s = g_string_new(NULL); + + g_string_printf(s, "\n" + "\n" + "\n"); + + mb_gen_xml_reg_tags(cpu, s); + mb_gen_xml_sreg_tags(cpu, s); + + g_string_append_printf(s, ""); + + cpu->dyn_xml.xml = g_string_free(s, false); +} + +const char *mb_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) +{ + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + + return cpu->dyn_xml.xml; +} -- 2.7.4