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X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aleksandar.qemu.devel@gmail.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The following changes since commit 49ee11555262a256afec592dfed7c5902d5eefd2: Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.1-pull-request' into staging (2020-06-08 11:04:57 +0100) are available in the git repository at: https://github.com/AMarkovic/qemu tags/mips-queue-jun-09-2020 for you to fetch changes up to 6db06115d246ea6d24755657a98c185ed2a50210: target/mips: Enable hardware page table walker and CMGCR features for P5600 (2020-06-09 17:32:45 +0200) ---------------------------------------------------------------- MIPS queue for June 9th, 2020 Highlights: - Registring change of email address for two contributors - Cleanup and improvements of FPU helpers - Enabling some features of P5600 - Adding two Loongson-3A CPU definitions - A checkpatch warning is known and should be ignored ---------------------------------------------------------------- Aleksandar Markovic (18): mailmap: Change email address of Filip Bozuta mailmap: Change email address of Stefan Brankovic target/mips: fpu: Demacro ADD. target/mips: fpu: Demacro SUB. target/mips: fpu: Demacro MUL. target/mips: fpu: Demacro DIV. target/mips: fpu: Remove now unused macro FLOAT_BINOP target/mips: fpu: Demacro MADD. target/mips: fpu: Demacro MSUB. target/mips: fpu: Demacro NMADD. target/mips: fpu: Demacro NMSUB. target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros target/mips: fpu: Demacro CLASS. target/mips: fpu: Remove now unused FLOAT_CLASS macro target/mips: fpu: Demacro RINT. target/mips: fpu: Remove now unused FLOAT_RINT macro target/mips: fpu: Name better paired-single variables target/mips: fpu: Refactor conversion from ieee to mips exception flags Andrea Oliveri (1): target/mips: Enable hardware page table walker and CMGCR features for P5600 Huacai Chen (1): target/mips: Add Loongson-3 CPU definition target/mips/cpu.h | 32 +- target/mips/internal.h | 3 +- target/mips/mips-defs.h | 45 +- target/mips/fpu_helper.c | 658 +++++++++++++++++++--------- target/mips/{lmi_helper.c => lmmi_helper.c} | 0 target/mips/msa_helper.c | 77 ++-- target/mips/translate.c | 2 + target/mips/translate_init.inc.c | 95 +++- .mailmap | 2 + target/mips/Makefile.objs | 2 +- 10 files changed, 658 insertions(+), 258 deletions(-) rename target/mips/{lmi_helper.c => lmmi_helper.c} (100%) -- 2.7.4