From: Cathy Zhang <cathy.zhang@intel.com>
To: qemu-devel@nongnu.org
Cc: Cathy Zhang <cathy.zhang@intel.com>,
pbonzini@redhat.com, ehabkost@redhat.com, rth@twiddle.net
Subject: [PATCH 0/2] Add new features for intel processor
Date: Mon, 6 Jul 2020 07:17:14 +0800 [thread overview]
Message-ID: <1593991036-12183-1-git-send-email-cathy.zhang@intel.com> (raw)
This patchset is to add two new features for intel processors
which support them, like Sapphire Rapids. SERIALIZE is a faster
serializing instruction which does not modify registers,
arithmetic flags or memory, will not cause VM exit. TSX suspend
load tracking instruction aims to give a way to choose which
memory accesses do not need to be tracked in the TSX read set.
Cathy Zhang (2):
target/i386: Add SERIALIZE cpu feature
target/i386: Enable TSX Suspend Load Address Tracking feature
target/i386/cpu.c | 4 ++--
target/i386/cpu.h | 4 ++++
2 files changed, 6 insertions(+), 2 deletions(-)
--
1.8.3.1
next reply other threads:[~2020-07-05 23:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-05 23:17 Cathy Zhang [this message]
2020-07-05 23:17 ` [PATCH 1/2] target/i386: Add SERIALIZE cpu feature Cathy Zhang
2020-07-05 23:17 ` [PATCH 2/2] target/i386: Enable TSX Suspend Load Address Tracking feature Cathy Zhang
2020-07-06 9:25 ` [PATCH 0/2] Add new features for intel processor Paolo Bonzini
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