From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:59754) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0VhB-0005T4-9A for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:42:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0VhA-0007D0-DF for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:42:25 -0400 Received: from mx3-phx2.redhat.com ([209.132.183.24]:44551) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0VhA-0007Cq-67 for qemu-devel@nongnu.org; Mon, 05 Sep 2011 05:42:24 -0400 Date: Mon, 5 Sep 2011 05:42:21 -0400 (EDT) From: Paolo Bonzini Message-ID: <1604966537.1072741.1315215741887.JavaMail.root@zmail07.collab.prod.int.phx2.redhat.com> In-Reply-To: <20110905080609.GB16038@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] virtio: Make memory barriers be memory barriers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: aik@ozlabs.ru, aliguori@us.ibm.com, rusty@rustcorp.com.au, qemu-devel@nongnu.org, agraf@suse.de > > No, rmb and wmb need to generate code. > > If they do we'll have to surround each their use with > ifndef x86 as you suggest later. Which is just messy. [1 hour later] I see what you mean now. You assume there are no accesses to write-combining memory (of course) or non-temporal load/stores (because they are accessed only with assembly), so you can make rmb/wmb no-ops on x86. I was confused by the kernel (and liburcu's) choice to use lfence/sfence for rmb/wmb. Then it's indeed better to move the wmb() defines to qemu-barrier.h, where they can be made processor-dependent. S390, it seems, also does not need rmb/wmb. Paolo