* [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported
@ 2020-11-30 4:05 Bin Meng
2020-11-30 4:05 ` [PATCH 2/2] hw/ssi: imx_spi: Disable chip selects in imx_spi_reset() Bin Meng
2020-12-01 1:53 ` [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported Alistair Francis
0 siblings, 2 replies; 4+ messages in thread
From: Bin Meng @ 2020-11-30 4:05 UTC (permalink / raw)
To: Alistair Francis, Jean-Christophe Dubois, Peter Chubb,
Peter Maydell, qemu-arm, qemu-devel
Cc: Bin Meng
From: Bin Meng <bin.meng@windriver.com>
Avoid using a magic number (4) everywhere for the number of chip
selects supported.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
hw/ssi/imx_spi.c | 4 ++--
include/hw/ssi/imx_spi.h | 5 ++++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index d8885ae..e605049 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -361,7 +361,7 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
/* We are in master mode */
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < ECSPI_NUM_CS; i++) {
qemu_set_irq(s->cs_lines[i],
i == imx_spi_selected_channel(s) ? 0 : 1);
}
@@ -424,7 +424,7 @@ static void imx_spi_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq);
- for (i = 0; i < 4; ++i) {
+ for (i = 0; i < ECSPI_NUM_CS; ++i) {
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->cs_lines[i]);
}
diff --git a/include/hw/ssi/imx_spi.h b/include/hw/ssi/imx_spi.h
index b82b17f..eeaf49b 100644
--- a/include/hw/ssi/imx_spi.h
+++ b/include/hw/ssi/imx_spi.h
@@ -77,6 +77,9 @@
#define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH)
+/* number of chip selects supported */
+#define ECSPI_NUM_CS 4
+
#define TYPE_IMX_SPI "imx.spi"
OBJECT_DECLARE_SIMPLE_TYPE(IMXSPIState, IMX_SPI)
@@ -89,7 +92,7 @@ struct IMXSPIState {
qemu_irq irq;
- qemu_irq cs_lines[4];
+ qemu_irq cs_lines[ECSPI_NUM_CS];
SSIBus *bus;
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] hw/ssi: imx_spi: Disable chip selects in imx_spi_reset()
2020-11-30 4:05 [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
@ 2020-11-30 4:05 ` Bin Meng
2020-12-01 1:54 ` Alistair Francis
2020-12-01 1:53 ` [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported Alistair Francis
1 sibling, 1 reply; 4+ messages in thread
From: Bin Meng @ 2020-11-30 4:05 UTC (permalink / raw)
To: Alistair Francis, Jean-Christophe Dubois, Peter Chubb,
Peter Maydell, qemu-arm, qemu-devel
Cc: Xuzhou Cheng, Bin Meng
From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
When a write to ECSPI_CONREG register to disable the SPI controller,
imx_spi_reset() is called to reset the controller, during which CS
lines should have been disabled, otherwise the state machine of any
devices (e.g.: SPI flashes) connected to the SPI master is stuck to
its last state and responds incorrectly to any follow-up commands.
Fixes c906a3a01582: ("i.MX: Add the Freescale SPI Controller")
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
hw/ssi/imx_spi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index e605049..85c172e 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -231,6 +231,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
static void imx_spi_reset(DeviceState *dev)
{
IMXSPIState *s = IMX_SPI(dev);
+ int i;
DPRINTF("\n");
@@ -243,6 +244,10 @@ static void imx_spi_reset(DeviceState *dev)
imx_spi_update_irq(s);
+ for (i = 0; i < ECSPI_NUM_CS; i++) {
+ qemu_set_irq(s->cs_lines[i], 1);
+ }
+
s->burst_length = 0;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported
2020-11-30 4:05 [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2020-11-30 4:05 ` [PATCH 2/2] hw/ssi: imx_spi: Disable chip selects in imx_spi_reset() Bin Meng
@ 2020-12-01 1:53 ` Alistair Francis
1 sibling, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2020-12-01 1:53 UTC (permalink / raw)
To: Bin Meng
Cc: Peter Maydell, Bin Meng, Alistair Francis,
qemu-devel@nongnu.org Developers, Jean-Christophe Dubois,
qemu-arm, Peter Chubb
On Sun, Nov 29, 2020 at 8:06 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> Avoid using a magic number (4) everywhere for the number of chip
> selects supported.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> hw/ssi/imx_spi.c | 4 ++--
> include/hw/ssi/imx_spi.h | 5 ++++-
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
> index d8885ae..e605049 100644
> --- a/hw/ssi/imx_spi.c
> +++ b/hw/ssi/imx_spi.c
> @@ -361,7 +361,7 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
>
> /* We are in master mode */
>
> - for (i = 0; i < 4; i++) {
> + for (i = 0; i < ECSPI_NUM_CS; i++) {
> qemu_set_irq(s->cs_lines[i],
> i == imx_spi_selected_channel(s) ? 0 : 1);
> }
> @@ -424,7 +424,7 @@ static void imx_spi_realize(DeviceState *dev, Error **errp)
> sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
> sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq);
>
> - for (i = 0; i < 4; ++i) {
> + for (i = 0; i < ECSPI_NUM_CS; ++i) {
> sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->cs_lines[i]);
> }
>
> diff --git a/include/hw/ssi/imx_spi.h b/include/hw/ssi/imx_spi.h
> index b82b17f..eeaf49b 100644
> --- a/include/hw/ssi/imx_spi.h
> +++ b/include/hw/ssi/imx_spi.h
> @@ -77,6 +77,9 @@
>
> #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH)
>
> +/* number of chip selects supported */
> +#define ECSPI_NUM_CS 4
> +
> #define TYPE_IMX_SPI "imx.spi"
> OBJECT_DECLARE_SIMPLE_TYPE(IMXSPIState, IMX_SPI)
>
> @@ -89,7 +92,7 @@ struct IMXSPIState {
>
> qemu_irq irq;
>
> - qemu_irq cs_lines[4];
> + qemu_irq cs_lines[ECSPI_NUM_CS];
>
> SSIBus *bus;
>
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] hw/ssi: imx_spi: Disable chip selects in imx_spi_reset()
2020-11-30 4:05 ` [PATCH 2/2] hw/ssi: imx_spi: Disable chip selects in imx_spi_reset() Bin Meng
@ 2020-12-01 1:54 ` Alistair Francis
0 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2020-12-01 1:54 UTC (permalink / raw)
To: Bin Meng
Cc: Peter Maydell, Bin Meng, Xuzhou Cheng, Alistair Francis,
qemu-devel@nongnu.org Developers, Jean-Christophe Dubois,
qemu-arm, Peter Chubb
On Sun, Nov 29, 2020 at 8:05 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
>
> When a write to ECSPI_CONREG register to disable the SPI controller,
> imx_spi_reset() is called to reset the controller, during which CS
> lines should have been disabled, otherwise the state machine of any
> devices (e.g.: SPI flashes) connected to the SPI master is stuck to
> its last state and responds incorrectly to any follow-up commands.
>
> Fixes c906a3a01582: ("i.MX: Add the Freescale SPI Controller")
> Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
>
> ---
>
> hw/ssi/imx_spi.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
> index e605049..85c172e 100644
> --- a/hw/ssi/imx_spi.c
> +++ b/hw/ssi/imx_spi.c
> @@ -231,6 +231,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
> static void imx_spi_reset(DeviceState *dev)
> {
> IMXSPIState *s = IMX_SPI(dev);
> + int i;
>
> DPRINTF("\n");
>
> @@ -243,6 +244,10 @@ static void imx_spi_reset(DeviceState *dev)
>
> imx_spi_update_irq(s);
>
> + for (i = 0; i < ECSPI_NUM_CS; i++) {
> + qemu_set_irq(s->cs_lines[i], 1);
> + }
> +
> s->burst_length = 0;
> }
>
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-12-01 2:08 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2020-11-30 4:05 [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2020-11-30 4:05 ` [PATCH 2/2] hw/ssi: imx_spi: Disable chip selects in imx_spi_reset() Bin Meng
2020-12-01 1:54 ` Alistair Francis
2020-12-01 1:53 ` [PATCH 1/2] hw/ssi: imx_spi: Use a macro for number of chip selects supported Alistair Francis
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