From: Michael Tross <michael@tross.org>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] 3DNow! instruction set emulation
Date: Mon, 17 Mar 2008 04:42:36 -0700 (PDT) [thread overview]
Message-ID: <16092150.post@talk.nabble.com> (raw)
In-Reply-To: <2544C44B-B563-4396-AF1E-12567DD0C633@users.sourceforge.net>
Joachim Henke-5 wrote:
>
> The attached patch adds the 3DNow! and extented 3DNow! instruction
> sets to qemu. I wrote this just according to the manuals from AMD,
> since I don't have an AMD processor for testing (which was actually
> my motivation to create this patch).
>
> Please note that (like with the SSE emulation) the rounding for the
> floating point operations isn't exact in every case. But the
> precision should be sufficient for typical applications.
>
> The CPUID is also extented by the bit for extented MMX, which is a
> subset of SSE and already implemented in qemu.
>
Rediffed the patch to apply to the current 0.9.1 release.
Additionally I've added a cpu definition that makes use of the 3dnow! flag.
With this patch I am able to load and run recent linux kernels compiled for
for the K7 32-bit architecture. Newer kernels test the cpu feature flags and
thus require certain feature flags to be present on the target cpu [1]. But
I didn't do further testing on the emulated instructions itself so far.
Regards,
Michael
[1] http://kerneltrap.org/node/11754
http://www.nabble.com/file/p16092150/3dnow.patch.gz 3dnow.patch.gz
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prev parent reply other threads:[~2008-03-17 11:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-04-29 19:32 [Qemu-devel] [PATCH] 3DNow! instruction set emulation Joachim Henke
2007-04-29 20:26 ` Joachim Henke
2008-03-17 11:42 ` Michael Tross [this message]
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