From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JbDjl-0003Sf-3a for qemu-devel@nongnu.org; Mon, 17 Mar 2008 07:42:41 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JbDjj-0003SO-C2 for qemu-devel@nongnu.org; Mon, 17 Mar 2008 07:42:40 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JbDjj-0003SL-7R for qemu-devel@nongnu.org; Mon, 17 Mar 2008 07:42:39 -0400 Received: from kuber.nabble.com ([216.139.236.158]) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JbDji-00072E-Pj for qemu-devel@nongnu.org; Mon, 17 Mar 2008 07:42:38 -0400 Received: from isper.nabble.com ([192.168.236.156]) by kuber.nabble.com with esmtp (Exim 4.63) (envelope-from ) id 1JbDjg-0003k5-D2 for qemu-devel@nongnu.org; Mon, 17 Mar 2008 04:42:36 -0700 Message-ID: <16092150.post@talk.nabble.com> Date: Mon, 17 Mar 2008 04:42:36 -0700 (PDT) From: Michael Tross Subject: Re: [Qemu-devel] [PATCH] 3DNow! instruction set emulation In-Reply-To: <2544C44B-B563-4396-AF1E-12567DD0C633@users.sourceforge.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit References: <2544C44B-B563-4396-AF1E-12567DD0C633@users.sourceforge.net> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Joachim Henke-5 wrote: > > The attached patch adds the 3DNow! and extented 3DNow! instruction > sets to qemu. I wrote this just according to the manuals from AMD, > since I don't have an AMD processor for testing (which was actually > my motivation to create this patch). > > Please note that (like with the SSE emulation) the rounding for the > floating point operations isn't exact in every case. But the > precision should be sufficient for typical applications. > > The CPUID is also extented by the bit for extented MMX, which is a > subset of SSE and already implemented in qemu. > Rediffed the patch to apply to the current 0.9.1 release. Additionally I've added a cpu definition that makes use of the 3dnow! flag. With this patch I am able to load and run recent linux kernels compiled for for the K7 32-bit architecture. Newer kernels test the cpu feature flags and thus require certain feature flags to be present on the target cpu [1]. But I didn't do further testing on the emulated instructions itself so far. Regards, Michael [1] http://kerneltrap.org/node/11754 http://www.nabble.com/file/p16092150/3dnow.patch.gz 3dnow.patch.gz -- View this message in context: http://www.nabble.com/-PATCH--3DNow%21-instruction-set-emulation-tp10244711p16092150.html Sent from the QEMU - Dev mailing list archive at Nabble.com.