[Qemu-devel] [PATCH] 3DNow! instruction set emulation

[Qemu-devel] [PATCH] 3DNow! instruction set emulation

[Joachim Henke]

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The attached patch adds the 3DNow! and extented 3DNow! instruction  
sets to qemu. I wrote this just according to the manuals from AMD,  
since I don't have an AMD processor for testing (which was actually  
my motivation to create this patch).

Please note that (like with the SSE emulation) the rounding for the  
floating point operations isn't exact in every case. But the  
precision should be sufficient for typical applications.

The CPUID is also extented by the bit for extented MMX, which is a  
subset of SSE and already implemented in qemu.

Would be nice, if someone could test this with an old computer game,  
etc...


I would appreciate any hints or suggestions.

Regards,
Jo.


-- 
Joachim Henke
http://base91.sourceforge.net/j-o/

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Re: [Qemu-devel] [PATCH] 3DNow! instruction set emulation

[Joachim Henke]

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Im sorry, but I just found that a checking should be done in a more  
proper way. Please additionally apply the attached patch after my  
3DNow! patch.


Sorry again,
Jo.


On 29 Apr 2007, at 21:32, Joachim Henke wrote:
> The attached patch adds the 3DNow! and extented 3DNow! instruction  
> sets to qemu.

-- 
Joachim Henke
http://base91.sourceforge.net/j-o/

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--- target-i386/translate.c
+++ target-i386/translate.c
@@ -2596,5 +2596,5 @@
     if (!sse_op2)
         goto illegal_op;
-    if ((b <= 0x5f && b != 0x0f) || b == 0xc6 || b == 0xc2) {
+    if ((b <= 0x5f && b >= 0x10) || b == 0xc6 || b == 0xc2) {
         is_xmm = 1;
     } else {

Re: [Qemu-devel] [PATCH] 3DNow! instruction set emulation

[Michael Tross]

Joachim Henke-5 wrote:
> 
> The attached patch adds the 3DNow! and extented 3DNow! instruction  
> sets to qemu. I wrote this just according to the manuals from AMD,  
> since I don't have an AMD processor for testing (which was actually  
> my motivation to create this patch).
> 
> Please note that (like with the SSE emulation) the rounding for the  
> floating point operations isn't exact in every case. But the  
> precision should be sufficient for typical applications.
> 
> The CPUID is also extented by the bit for extented MMX, which is a  
> subset of SSE and already implemented in qemu.
> 

Rediffed the patch to apply to the current 0.9.1 release.

Additionally I've added a cpu definition that makes use of the 3dnow! flag.

With this patch I am able to load and run recent linux kernels compiled for
for the K7 32-bit architecture. Newer kernels test the cpu feature flags and
thus require certain feature flags to be present on the target cpu [1]. But
I didn't do further testing on the emulated instructions itself so far.

Regards,
Michael


[1] http://kerneltrap.org/node/11754

http://www.nabble.com/file/p16092150/3dnow.patch.gz 3dnow.patch.gz 
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