From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, bcain@quicinc.com, richard.henderson@linaro.org,
laurent@vivier.eu, tsimpson@quicinc.com, philmd@redhat.com
Subject: [PATCH v6 12/35] Hexagon (target/hexagon) instruction attributes
Date: Thu, 7 Jan 2021 22:28:43 -0600 [thread overview]
Message-ID: <1610080146-14968-13-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1610080146-14968-1-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/attribs.h | 30 ++++++++++++++
target/hexagon/attribs_def.h | 97 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 127 insertions(+)
create mode 100644 target/hexagon/attribs.h
create mode 100644 target/hexagon/attribs_def.h
diff --git a/target/hexagon/attribs.h b/target/hexagon/attribs.h
new file mode 100644
index 0000000..e745135
--- /dev/null
+++ b/target/hexagon/attribs.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_ATTRIBS_H
+#define HEXAGON_ATTRIBS_H
+
+enum {
+#define DEF_ATTRIB(NAME, ...) A_##NAME,
+#include "attribs_def.h"
+#undef DEF_ATTRIB
+};
+
+#define GET_ATTRIB(opcode, attrib) \
+ test_bit(attrib, opcode_attribs[opcode])
+
+#endif /* ATTRIBS_H */
diff --git a/target/hexagon/attribs_def.h b/target/hexagon/attribs_def.h
new file mode 100644
index 0000000..12ceaf1
--- /dev/null
+++ b/target/hexagon/attribs_def.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Keep this as the first attribute: */
+DEF_ATTRIB(AA_DUMMY, "Dummy Zeroth Attribute", "", "")
+
+/* Misc */
+DEF_ATTRIB(EXTENSION, "Extension instruction", "", "")
+
+DEF_ATTRIB(PRIV, "Not available in user or guest mode", "", "")
+DEF_ATTRIB(GUEST, "Not available in user mode", "", "")
+
+DEF_ATTRIB(FPOP, "Floating Point Operation", "", "")
+
+DEF_ATTRIB(EXTENDABLE, "Immediate may be extended", "", "")
+
+DEF_ATTRIB(ARCHV2, "V2 architecture", "", "")
+DEF_ATTRIB(ARCHV3, "V3 architecture", "", "")
+DEF_ATTRIB(ARCHV4, "V4 architecture", "", "")
+DEF_ATTRIB(ARCHV5, "V5 architecture", "", "")
+
+DEF_ATTRIB(SUBINSN, "sub-instruction", "", "")
+
+/* Load and Store attributes */
+DEF_ATTRIB(LOAD, "Loads from memory", "", "")
+DEF_ATTRIB(STORE, "Stores to memory", "", "")
+DEF_ATTRIB(MEMLIKE, "Memory-like instruction", "", "")
+DEF_ATTRIB(MEMLIKE_PACKET_RULES, "follows Memory-like packet rules", "", "")
+
+
+/* Change-of-flow attributes */
+DEF_ATTRIB(JUMP, "Jump-type instruction", "", "")
+DEF_ATTRIB(INDIRECT, "Absolute register jump", "", "")
+DEF_ATTRIB(CALL, "Function call instruction", "", "")
+DEF_ATTRIB(COF, "Change-of-flow instruction", "", "")
+DEF_ATTRIB(CONDEXEC, "May be cancelled by a predicate", "", "")
+DEF_ATTRIB(DOTNEWVALUE, "Uses a register value generated in this pkt", "", "")
+DEF_ATTRIB(NEWCMPJUMP, "Compound compare and jump", "", "")
+
+/* access to implicit registers */
+DEF_ATTRIB(IMPLICIT_WRITES_LR, "Writes the link register", "", "UREG.LR")
+DEF_ATTRIB(IMPLICIT_WRITES_PC, "Writes the program counter", "", "UREG.PC")
+DEF_ATTRIB(IMPLICIT_WRITES_SP, "Writes the stack pointer", "", "UREG.SP")
+DEF_ATTRIB(IMPLICIT_WRITES_FP, "Writes the frame pointer", "", "UREG.FP")
+DEF_ATTRIB(IMPLICIT_WRITES_GP, "Writes the GP register", "", "UREG.GP")
+DEF_ATTRIB(IMPLICIT_WRITES_LC0, "Writes loop count for loop 0", "", "UREG.LC0")
+DEF_ATTRIB(IMPLICIT_WRITES_LC1, "Writes loop count for loop 1", "", "UREG.LC1")
+DEF_ATTRIB(IMPLICIT_WRITES_SA0, "Writes start addr for loop 0", "", "UREG.SA0")
+DEF_ATTRIB(IMPLICIT_WRITES_SA1, "Writes start addr for loop 1", "", "UREG.SA1")
+DEF_ATTRIB(IMPLICIT_WRITES_P0, "Writes Predicate 0", "", "UREG.P0")
+DEF_ATTRIB(IMPLICIT_WRITES_P1, "Writes Predicate 1", "", "UREG.P1")
+DEF_ATTRIB(IMPLICIT_WRITES_P2, "Writes Predicate 1", "", "UREG.P2")
+DEF_ATTRIB(IMPLICIT_WRITES_P3, "May write Predicate 3", "", "UREG.P3")
+
+DEF_ATTRIB(CRSLOT23, "Can execute in slot 2 or slot 3 (CR)", "", "")
+DEF_ATTRIB(IT_NOP, "nop instruction", "", "")
+DEF_ATTRIB(IT_EXTENDER, "constant extender instruction", "", "")
+
+
+/* Restrictions to make note of */
+DEF_ATTRIB(RESTRICT_SLOT0ONLY, "Must execute on slot0", "", "")
+DEF_ATTRIB(RESTRICT_SLOT1ONLY, "Must execute on slot1", "", "")
+DEF_ATTRIB(RESTRICT_SLOT2ONLY, "Must execute on slot2", "", "")
+DEF_ATTRIB(RESTRICT_SLOT3ONLY, "Must execute on slot3", "", "")
+DEF_ATTRIB(RESTRICT_NOSLOT1, "No slot 1 instruction in parallel", "", "")
+DEF_ATTRIB(RESTRICT_PREFERSLOT0, "Try to encode into slot 0", "", "")
+
+DEF_ATTRIB(ICOP, "Instruction cache op", "", "")
+
+DEF_ATTRIB(HWLOOP0_END, "Ends HW loop0", "", "")
+DEF_ATTRIB(HWLOOP1_END, "Ends HW loop1", "", "")
+DEF_ATTRIB(DCZEROA, "dczeroa type", "", "")
+DEF_ATTRIB(ICFLUSHOP, "icflush op type", "", "")
+DEF_ATTRIB(DCFLUSHOP, "dcflush op type", "", "")
+DEF_ATTRIB(DCFETCH, "dcfetch type", "", "")
+
+DEF_ATTRIB(L2FETCH, "Instruction is l2fetch type", "", "")
+
+DEF_ATTRIB(ICINVA, "icinva", "", "")
+DEF_ATTRIB(DCCLEANINVA, "dccleaninva", "", "")
+
+/* Keep this as the last attribute: */
+DEF_ATTRIB(ZZ_LASTATTRIB, "Last attribute in the file", "", "")
--
2.7.4
next prev parent reply other threads:[~2021-01-08 4:43 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-08 4:28 [PATCH v6 00/35] Hexagon patch series Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 01/35] Hexagon Update MAINTAINERS file Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 02/35] Hexagon (target/hexagon) README Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 03/35] Hexagon (include/elf.h) ELF machine definition Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 04/35] Hexagon (target/hexagon) scalar core definition Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 05/35] Hexagon (disas) disassembler Taylor Simpson
2021-01-09 21:37 ` Philippe Mathieu-Daudé
2021-01-11 21:14 ` Taylor Simpson
2021-01-11 22:20 ` Philippe Mathieu-Daudé
2021-01-12 9:35 ` Daniel P. Berrangé
2021-01-08 4:28 ` [PATCH v6 06/35] Hexagon (target/hexagon) register names Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 07/35] Hexagon (target/hexagon) scalar core helpers Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 08/35] Hexagon (target/hexagon) GDB Stub Taylor Simpson
2021-01-09 21:44 ` Philippe Mathieu-Daudé
2021-01-08 4:28 ` [PATCH v6 09/35] Hexagon (target/hexagon) architecture types Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 10/35] Hexagon (target/hexagon) instruction and packet types Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 11/35] Hexagon (target/hexagon) register fields Taylor Simpson
2021-01-08 4:28 ` Taylor Simpson [this message]
2021-01-08 4:28 ` [PATCH v6 13/35] Hexagon (target/hexagon) instruction/packet decode Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 14/35] Hexagon (target/hexagon) instruction printing Taylor Simpson
2021-01-09 22:41 ` Philippe Mathieu-Daudé
2021-01-08 4:28 ` [PATCH v6 15/35] Hexagon (target/hexagon/arch.[ch]) utility functions Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 16/35] Hexagon (target/hexagon/conv_emu.[ch]) " Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 17/35] Hexagon (target/hexagon/fma_emu.[ch]) " Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 18/35] Hexagon (target/hexagon/imported) arch import Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 19/35] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 20/35] Hexagon (target/hexagon) generator phase 2 - generate header files Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 21/35] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 22/35] Hexagon (target/hexagon) generater phase 4 - " Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 23/35] Hexagon (target/hexagon) opcode data structures Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 24/35] Hexagon (target/hexagon) macros Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 25/35] Hexagon (target/hexagon) instruction classes Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 26/35] Hexagon (target/hexagon) TCG generation Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 27/35] Hexagon (target/hexagon) TCG for instructions with multiple definitions Taylor Simpson
2021-01-08 4:28 ` [PATCH v6 28/35] Hexagon (target/hexagon) TCG for floating point instructions Taylor Simpson
2021-01-08 4:29 ` [PATCH v6 29/35] Hexagon (target/hexagon) translation Taylor Simpson
2021-01-08 4:29 ` [PATCH v6 30/35] Hexagon (linux-user/hexagon) Linux user emulation Taylor Simpson
2021-01-08 4:29 ` [PATCH v6 31/35] Hexagon (tests/tcg/hexagon) TCG tests Taylor Simpson
2021-01-12 12:04 ` Alex Bennée
2021-01-12 17:06 ` Taylor Simpson
2021-01-08 4:29 ` [PATCH v6 32/35] Hexagon build infrastructure Taylor Simpson
2021-01-08 4:29 ` [PATCH v6 33/35] Add Dockerfile for hexagon Taylor Simpson
2021-01-08 4:29 ` [PATCH v6 34/35] Auto-import Docker support files Taylor Simpson
2021-01-12 11:58 ` Alex Bennée
2021-01-12 13:53 ` Alessandro Di Federico via
2021-01-12 18:26 ` Alex Bennée
2021-01-21 12:20 ` ale--- via
2021-01-08 4:29 ` [PATCH v6 35/35] Add newline when generating Dockerfile Taylor Simpson
2021-01-12 11:59 ` Alex Bennée
2021-01-08 5:16 ` [PATCH v6 00/35] Hexagon patch series no-reply
2021-01-12 19:42 ` Alex Bennée
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