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From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, bcain@quicinc.com, philmd@redhat.com,
	richard.henderson@linaro.org, laurent@vivier.eu,
	tsimpson@quicinc.com, alex.bennee@linaro.org
Subject: [PATCH v7 14/35] Hexagon (target/hexagon) instruction printing
Date: Tue, 19 Jan 2021 21:28:47 -0600	[thread overview]
Message-ID: <1611113349-24906-15-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1611113349-24906-1-git-send-email-tsimpson@quicinc.com>

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org
---
 target/hexagon/printinsn.h |  28 +++++++++
 target/hexagon/printinsn.c | 146 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 174 insertions(+)
 create mode 100644 target/hexagon/printinsn.h
 create mode 100644 target/hexagon/printinsn.c

diff --git a/target/hexagon/printinsn.h b/target/hexagon/printinsn.h
new file mode 100644
index 0000000..d6331e0
--- /dev/null
+++ b/target/hexagon/printinsn.h
@@ -0,0 +1,28 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_PRINTINSN_H
+#define HEXAGON_PRINTINSN_H
+
+#include "qemu/osdep.h"
+#include "insn.h"
+
+extern void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,
+                                target_ulong pc);
+extern void snprint_a_pkt_debug(GString *buf, Packet *pkt);
+
+#endif
diff --git a/target/hexagon/printinsn.c b/target/hexagon/printinsn.c
new file mode 100644
index 0000000..9a716b1
--- /dev/null
+++ b/target/hexagon/printinsn.c
@@ -0,0 +1,146 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "opcodes.h"
+#include "printinsn.h"
+#include "insn.h"
+#include "reg_fields.h"
+#include "internal.h"
+
+static const char *sreg2str(unsigned int reg)
+{
+    if (reg < TOTAL_PER_THREAD_REGS) {
+        return hexagon_regnames[reg];
+    } else {
+        return "???";
+    }
+}
+
+static const char *creg2str(unsigned int reg)
+{
+    return sreg2str(reg + HEX_REG_SA0);
+}
+
+static void snprintinsn(GString *buf, Insn *insn)
+{
+    switch (insn->opcode) {
+#define DEF_VECX_PRINTINFO(TAG, FMT, ...) DEF_PRINTINFO(TAG, FMT, __VA_ARGS__)
+#define DEF_PRINTINFO(TAG, FMT, ...) \
+    case TAG: \
+        g_string_append_printf(buf, FMT, __VA_ARGS__); \
+        break;
+#include "printinsn_generated.h"
+#undef DEF_VECX_PRINTINFO
+#undef DEF_PRINTINFO
+    }
+}
+
+void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,
+                         target_ulong pc)
+{
+    bool has_endloop0 = false;
+    bool has_endloop1 = false;
+    bool has_endloop01 = false;
+
+    for (int i = 0; i < pkt->num_insns; i++) {
+        if (pkt->insn[i].part1) {
+            continue;
+        }
+
+        /* We'll print the endloop's at the end of the packet */
+        if (pkt->insn[i].opcode == J2_endloop0) {
+            has_endloop0 = true;
+            continue;
+        }
+        if (pkt->insn[i].opcode == J2_endloop1) {
+            has_endloop1 = true;
+            continue;
+        }
+        if (pkt->insn[i].opcode == J2_endloop01) {
+            has_endloop01 = true;
+            continue;
+        }
+
+        g_string_append_printf(buf, "0x" TARGET_FMT_lx "\t", words[i]);
+
+        if (i == 0) {
+            g_string_append(buf, "{");
+        }
+
+        g_string_append(buf, "\t");
+        snprintinsn(buf, &(pkt->insn[i]));
+
+        if (i < pkt->num_insns - 1) {
+            /*
+             * Subinstructions are two instructions encoded
+             * in the same word. Print them on the same line.
+             */
+            if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN)) {
+                g_string_append(buf, "; ");
+                snprintinsn(buf, &(pkt->insn[i + 1]));
+                i++;
+            } else if (pkt->insn[i + 1].opcode != J2_endloop0 &&
+                       pkt->insn[i + 1].opcode != J2_endloop1 &&
+                       pkt->insn[i + 1].opcode != J2_endloop01) {
+                pc += 4;
+                g_string_append_printf(buf, "\n0x" TARGET_FMT_lx ":  ", pc);
+            }
+        }
+    }
+    g_string_append(buf, " }");
+    if (has_endloop0) {
+        g_string_append(buf, "  :endloop0");
+    }
+    if (has_endloop1) {
+        g_string_append(buf, "  :endloop1");
+    }
+    if (has_endloop01) {
+        g_string_append(buf, "  :endloop01");
+    }
+}
+
+void snprint_a_pkt_debug(GString *buf, Packet *pkt)
+{
+    int slot, opcode;
+
+    if (pkt->num_insns > 1) {
+        g_string_append(buf, "\n{\n");
+    }
+
+    for (int i = 0; i < pkt->num_insns; i++) {
+        if (pkt->insn[i].part1) {
+            continue;
+        }
+        g_string_append(buf, "\t");
+        snprintinsn(buf, &(pkt->insn[i]));
+
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN)) {
+            g_string_append(buf, " //subinsn");
+        }
+        if (pkt->insn[i].extension_valid) {
+            g_string_append(buf, " //constant extended");
+        }
+        slot = pkt->insn[i].slot;
+        opcode = pkt->insn[i].opcode;
+        g_string_append_printf(buf, " //slot=%d:tag=%s\n",
+                               slot, opcode_names[opcode]);
+    }
+    if (pkt->num_insns > 1) {
+        g_string_append(buf, "}\n");
+    }
+}
-- 
2.7.4


  parent reply	other threads:[~2021-01-20  3:40 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-20  3:28 [PATCH v7 00/35] Hexagon patch series Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 01/35] Hexagon Update MAINTAINERS file Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 02/35] Hexagon (target/hexagon) README Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 03/35] Hexagon (include/elf.h) ELF machine definition Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 04/35] Hexagon (target/hexagon) scalar core definition Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 05/35] Hexagon (disas) disassembler Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 06/35] Hexagon (target/hexagon) register names Taylor Simpson
2021-01-22 17:46   ` Philippe Mathieu-Daudé
2021-01-20  3:28 ` [PATCH v7 07/35] Hexagon (target/hexagon) scalar core helpers Taylor Simpson
2021-01-22 20:30   ` Philippe Mathieu-Daudé
2021-01-22 21:44     ` Philippe Mathieu-Daudé
2021-01-22 21:50     ` Taylor Simpson
2021-01-25 16:16       ` Philippe Mathieu-Daudé
2021-01-20  3:28 ` [PATCH v7 08/35] Hexagon (target/hexagon) GDB Stub Taylor Simpson
2021-01-22 17:48   ` Philippe Mathieu-Daudé
2021-01-20  3:28 ` [PATCH v7 09/35] Hexagon (target/hexagon) architecture types Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 10/35] Hexagon (target/hexagon) instruction and packet types Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 11/35] Hexagon (target/hexagon) register fields Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 12/35] Hexagon (target/hexagon) instruction attributes Taylor Simpson
2021-01-22 17:53   ` Philippe Mathieu-Daudé
2021-01-22 22:01     ` Taylor Simpson
2021-01-25 16:21       ` Philippe Mathieu-Daudé
2021-01-29 23:15         ` Taylor Simpson
2021-02-05 17:35           ` Philippe Mathieu-Daudé
2021-01-20  3:28 ` [PATCH v7 13/35] Hexagon (target/hexagon) instruction/packet decode Taylor Simpson
2021-01-20  3:28 ` Taylor Simpson [this message]
2021-01-22 17:58   ` [PATCH v7 14/35] Hexagon (target/hexagon) instruction printing Philippe Mathieu-Daudé
2021-01-22 18:10     ` Eric Blake
2021-01-20  3:28 ` [PATCH v7 15/35] Hexagon (target/hexagon/arch.[ch]) utility functions Taylor Simpson
2021-01-22 18:09   ` Philippe Mathieu-Daudé
2021-01-22 21:59     ` Taylor Simpson
2021-01-25 16:29       ` Philippe Mathieu-Daudé
2021-01-25 21:43         ` Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 16/35] Hexagon (target/hexagon/conv_emu.[ch]) " Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 17/35] Hexagon (target/hexagon/fma_emu.[ch]) " Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 18/35] Hexagon (target/hexagon/imported) arch import Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 19/35] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 20/35] Hexagon (target/hexagon) generator phase 2 - generate header files Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 21/35] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 22/35] Hexagon (target/hexagon) generater phase 4 - " Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 23/35] Hexagon (target/hexagon) opcode data structures Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 24/35] Hexagon (target/hexagon) macros Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 25/35] Hexagon (target/hexagon) instruction classes Taylor Simpson
2021-01-20  3:28 ` [PATCH v7 26/35] Hexagon (target/hexagon) TCG generation Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 27/35] Hexagon (target/hexagon) TCG for instructions with multiple definitions Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 28/35] Hexagon (target/hexagon) TCG for floating point instructions Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 29/35] Hexagon (target/hexagon) translation Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 30/35] Hexagon (linux-user/hexagon) Linux user emulation Taylor Simpson
2021-02-17 20:15   ` Laurent Vivier
2021-02-17 21:10     ` Richard Henderson
2021-01-20  3:29 ` [PATCH v7 31/35] Hexagon (tests/tcg/hexagon) TCG tests - multiarch Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 32/35] Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 33/35] Hexagon (tests/tcg/hexagon) TCG tests - floating point Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 34/35] Hexagon build infrastructure Taylor Simpson
2021-01-22 22:34   ` Philippe Mathieu-Daudé
2021-01-22 22:41     ` Philippe Mathieu-Daudé
2021-01-22 22:44       ` Philippe Mathieu-Daudé
2021-01-27 19:16       ` Taylor Simpson
2021-01-20  3:29 ` [PATCH v7 35/35] Add Dockerfile for hexagon Taylor Simpson
2021-01-20  4:13 ` [PATCH v7 00/35] Hexagon patch series no-reply
2021-01-25 22:14 ` Philippe Mathieu-Daudé
2021-01-25 23:09   ` Taylor Simpson
2021-01-25 23:28     ` Brian Cain
2021-03-17  0:08       ` Philippe Mathieu-Daudé

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