From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, bcain@quicinc.com, philmd@redhat.com,
richard.henderson@linaro.org, laurent@vivier.eu,
tsimpson@quicinc.com, alex.bennee@linaro.org
Subject: [PATCH v7 23/35] Hexagon (target/hexagon) opcode data structures
Date: Tue, 19 Jan 2021 21:28:56 -0600 [thread overview]
Message-ID: <1611113349-24906-24-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1611113349-24906-1-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/opcodes.h | 63 +++++++++++++++++++++
target/hexagon/opcodes.c | 142 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 205 insertions(+)
create mode 100644 target/hexagon/opcodes.h
create mode 100644 target/hexagon/opcodes.c
diff --git a/target/hexagon/opcodes.h b/target/hexagon/opcodes.h
new file mode 100644
index 0000000..9d38687
--- /dev/null
+++ b/target/hexagon/opcodes.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_OPCODES_H
+#define HEXAGON_OPCODES_H
+
+#include "qemu/bitmap.h"
+#include "attribs.h"
+
+typedef enum {
+#define OPCODE(IID) IID
+#include "opcodes_def_generated.h"
+ XX_LAST_OPCODE
+#undef OPCODE
+} Opcode;
+
+typedef enum {
+ NORMAL,
+ HALF,
+ SUBINSN_A,
+ SUBINSN_L1,
+ SUBINSN_L2,
+ SUBINSN_S1,
+ SUBINSN_S2,
+ EXT_noext,
+ EXT_mmvec,
+ XX_LAST_ENC_CLASS
+} EncClass;
+
+extern const char * const opcode_names[];
+
+extern const char * const opcode_reginfo[];
+extern const char * const opcode_rregs[];
+extern const char * const opcode_wregs[];
+
+typedef struct {
+ const char * const encoding;
+ const EncClass enc_class;
+} OpcodeEncoding;
+
+extern const OpcodeEncoding opcode_encodings[XX_LAST_OPCODE];
+
+extern DECLARE_BITMAP(opcode_attribs[XX_LAST_OPCODE], A_ZZ_LASTATTRIB);
+
+extern void opcode_init(void);
+
+extern int opcode_which_immediate_is_extended(Opcode opcode);
+
+#endif
diff --git a/target/hexagon/opcodes.c b/target/hexagon/opcodes.c
new file mode 100644
index 0000000..ba41450
--- /dev/null
+++ b/target/hexagon/opcodes.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * opcodes.c
+ *
+ * data tables generated automatically
+ * Maybe some functions too
+ */
+
+#include "qemu/osdep.h"
+#include "opcodes.h"
+#include "decode.h"
+
+#define VEC_DESCR(A, B, C) DESCR(A, B, C)
+#define DONAME(X) #X
+
+const char * const opcode_names[] = {
+#define OPCODE(IID) DONAME(IID)
+#include "opcodes_def_generated.h"
+ NULL
+#undef OPCODE
+};
+
+const char * const opcode_reginfo[] = {
+#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
+#define REGINFO(TAG, REGINFO, RREGS, WREGS) REGINFO,
+#include "op_regs_generated.h"
+ NULL
+#undef REGINFO
+#undef IMMINFO
+};
+
+
+const char * const opcode_rregs[] = {
+#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
+#define REGINFO(TAG, REGINFO, RREGS, WREGS) RREGS,
+#include "op_regs_generated.h"
+ NULL
+#undef REGINFO
+#undef IMMINFO
+};
+
+
+const char * const opcode_wregs[] = {
+#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
+#define REGINFO(TAG, REGINFO, RREGS, WREGS) WREGS,
+#include "op_regs_generated.h"
+ NULL
+#undef REGINFO
+#undef IMMINFO
+};
+
+const char * const opcode_short_semantics[] = {
+#define DEF_SHORTCODE(TAG, SHORTCODE) [TAG] = #SHORTCODE,
+#include "shortcode_generated.h"
+#undef DEF_SHORTCODE
+ NULL
+};
+
+DECLARE_BITMAP(opcode_attribs[XX_LAST_OPCODE], A_ZZ_LASTATTRIB);
+
+static void init_attribs(int tag, ...)
+{
+ va_list ap;
+ int attr;
+ va_start(ap, tag);
+ while ((attr = va_arg(ap, int)) != 0) {
+ set_bit(attr, opcode_attribs[tag]);
+ }
+}
+
+const OpcodeEncoding opcode_encodings[] = {
+#define DEF_ENC32(OPCODE, ENCSTR) \
+ [OPCODE] = { .encoding = ENCSTR },
+
+#define DEF_ENC_SUBINSN(OPCODE, CLASS, ENCSTR) \
+ [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
+
+#define DEF_EXT_ENC(OPCODE, CLASS, ENCSTR) \
+ [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
+
+#include "imported/encode.def"
+
+#undef DEF_ENC32
+#undef DEF_ENC_SUBINSN
+#undef DEF_EXT_ENC
+};
+
+void opcode_init(void)
+{
+ init_attribs(0, 0);
+
+#define ATTRIBS(...) , ## __VA_ARGS__, 0
+#define OP_ATTRIB(TAG, ARGS) init_attribs(TAG ARGS);
+#include "op_attribs_generated.h"
+#undef OP_ATTRIB
+#undef ATTRIBS
+
+ decode_init();
+}
+
+
+#define NEEDLE "IMMEXT("
+
+int opcode_which_immediate_is_extended(Opcode opcode)
+{
+ const char *p;
+
+ g_assert(opcode < XX_LAST_OPCODE);
+ g_assert(GET_ATTRIB(opcode, A_EXTENDABLE));
+
+ p = opcode_short_semantics[opcode];
+ p = strstr(p, NEEDLE);
+ g_assert(p);
+ p += strlen(NEEDLE);
+ while (isspace(*p)) {
+ p++;
+ }
+ /* lower is always imm 0, upper always imm 1. */
+ if (islower(*p)) {
+ return 0;
+ } else if (isupper(*p)) {
+ return 1;
+ } else {
+ g_assert_not_reached();
+ }
+}
--
2.7.4
next prev parent reply other threads:[~2021-01-20 3:39 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-20 3:28 [PATCH v7 00/35] Hexagon patch series Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 01/35] Hexagon Update MAINTAINERS file Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 02/35] Hexagon (target/hexagon) README Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 03/35] Hexagon (include/elf.h) ELF machine definition Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 04/35] Hexagon (target/hexagon) scalar core definition Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 05/35] Hexagon (disas) disassembler Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 06/35] Hexagon (target/hexagon) register names Taylor Simpson
2021-01-22 17:46 ` Philippe Mathieu-Daudé
2021-01-20 3:28 ` [PATCH v7 07/35] Hexagon (target/hexagon) scalar core helpers Taylor Simpson
2021-01-22 20:30 ` Philippe Mathieu-Daudé
2021-01-22 21:44 ` Philippe Mathieu-Daudé
2021-01-22 21:50 ` Taylor Simpson
2021-01-25 16:16 ` Philippe Mathieu-Daudé
2021-01-20 3:28 ` [PATCH v7 08/35] Hexagon (target/hexagon) GDB Stub Taylor Simpson
2021-01-22 17:48 ` Philippe Mathieu-Daudé
2021-01-20 3:28 ` [PATCH v7 09/35] Hexagon (target/hexagon) architecture types Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 10/35] Hexagon (target/hexagon) instruction and packet types Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 11/35] Hexagon (target/hexagon) register fields Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 12/35] Hexagon (target/hexagon) instruction attributes Taylor Simpson
2021-01-22 17:53 ` Philippe Mathieu-Daudé
2021-01-22 22:01 ` Taylor Simpson
2021-01-25 16:21 ` Philippe Mathieu-Daudé
2021-01-29 23:15 ` Taylor Simpson
2021-02-05 17:35 ` Philippe Mathieu-Daudé
2021-01-20 3:28 ` [PATCH v7 13/35] Hexagon (target/hexagon) instruction/packet decode Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 14/35] Hexagon (target/hexagon) instruction printing Taylor Simpson
2021-01-22 17:58 ` Philippe Mathieu-Daudé
2021-01-22 18:10 ` Eric Blake
2021-01-20 3:28 ` [PATCH v7 15/35] Hexagon (target/hexagon/arch.[ch]) utility functions Taylor Simpson
2021-01-22 18:09 ` Philippe Mathieu-Daudé
2021-01-22 21:59 ` Taylor Simpson
2021-01-25 16:29 ` Philippe Mathieu-Daudé
2021-01-25 21:43 ` Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 16/35] Hexagon (target/hexagon/conv_emu.[ch]) " Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 17/35] Hexagon (target/hexagon/fma_emu.[ch]) " Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 18/35] Hexagon (target/hexagon/imported) arch import Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 19/35] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 20/35] Hexagon (target/hexagon) generator phase 2 - generate header files Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 21/35] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 22/35] Hexagon (target/hexagon) generater phase 4 - " Taylor Simpson
2021-01-20 3:28 ` Taylor Simpson [this message]
2021-01-20 3:28 ` [PATCH v7 24/35] Hexagon (target/hexagon) macros Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 25/35] Hexagon (target/hexagon) instruction classes Taylor Simpson
2021-01-20 3:28 ` [PATCH v7 26/35] Hexagon (target/hexagon) TCG generation Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 27/35] Hexagon (target/hexagon) TCG for instructions with multiple definitions Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 28/35] Hexagon (target/hexagon) TCG for floating point instructions Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 29/35] Hexagon (target/hexagon) translation Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 30/35] Hexagon (linux-user/hexagon) Linux user emulation Taylor Simpson
2021-02-17 20:15 ` Laurent Vivier
2021-02-17 21:10 ` Richard Henderson
2021-01-20 3:29 ` [PATCH v7 31/35] Hexagon (tests/tcg/hexagon) TCG tests - multiarch Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 32/35] Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 33/35] Hexagon (tests/tcg/hexagon) TCG tests - floating point Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 34/35] Hexagon build infrastructure Taylor Simpson
2021-01-22 22:34 ` Philippe Mathieu-Daudé
2021-01-22 22:41 ` Philippe Mathieu-Daudé
2021-01-22 22:44 ` Philippe Mathieu-Daudé
2021-01-27 19:16 ` Taylor Simpson
2021-01-20 3:29 ` [PATCH v7 35/35] Add Dockerfile for hexagon Taylor Simpson
2021-01-20 4:13 ` [PATCH v7 00/35] Hexagon patch series no-reply
2021-01-25 22:14 ` Philippe Mathieu-Daudé
2021-01-25 23:09 ` Taylor Simpson
2021-01-25 23:28 ` Brian Cain
2021-03-17 0:08 ` Philippe Mathieu-Daudé
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