From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, philmd@redhat.com, tsimpson@quicinc.com,
richard.henderson@linaro.org, bcain@quicinc.com
Subject: [PATCH 01/15] Hexagon (target/hexagon) TCG generation cleanup
Date: Wed, 24 Mar 2021 21:49:56 -0500 [thread overview]
Message-ID: <1616640610-17319-2-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1616640610-17319-1-git-send-email-tsimpson@quicinc.com>
Simplify TCG generation of hex_reg_written
Address feedback from Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/genptr.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index 7481f4c..349b949 100644
--- a/target/hexagon/genptr.c
+++ b/target/hexagon/genptr.c
@@ -43,9 +43,15 @@ static inline void gen_log_predicated_reg_write(int rnum, TCGv val, int slot)
tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum], slot_mask, zero,
val, hex_new_value[rnum]);
#if HEX_DEBUG
- /* Do this so HELPER(debug_commit_end) will know */
- tcg_gen_movcond_tl(TCG_COND_EQ, hex_reg_written[rnum], slot_mask, zero,
- one, hex_reg_written[rnum]);
+ /*
+ * Do this so HELPER(debug_commit_end) will know
+ *
+ * Note that slot_mask indicates the value is not written
+ * (i.e., slot was cancelled), so we create a true/false value before
+ * or'ing with hex_reg_written[rnum].
+ */
+ tcg_gen_setcond_tl(TCG_COND_EQ, slot_mask, slot_mask, zero);
+ tcg_gen_or_tl(hex_reg_written[rnum], hex_reg_written[rnum], slot_mask);
#endif
tcg_temp_free(one);
--
2.7.4
next prev parent reply other threads:[~2021-03-25 3:12 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 2:49 [PATCH 00/15] Hexagon (target/hexagon) update Taylor Simpson
2021-03-25 2:49 ` Taylor Simpson [this message]
2021-03-25 12:56 ` [PATCH 01/15] Hexagon (target/hexagon) TCG generation cleanup Richard Henderson
2021-03-25 2:49 ` [PATCH 02/15] Hexagon (target/hexagon) remove unnecessary inline directives Taylor Simpson
2021-03-25 13:02 ` Richard Henderson
2021-03-25 2:49 ` [PATCH 03/15] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN Taylor Simpson
2021-03-25 14:38 ` Richard Henderson
2021-03-25 2:49 ` [PATCH 04/15] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Taylor Simpson
2021-03-25 14:42 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 05/15] Hexagon (target/hexagon) change variables from int to bool when appropriate Taylor Simpson
2021-03-25 9:35 ` Philippe Mathieu-Daudé
2021-03-25 14:44 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 06/15] Hexagon (target/hexagon) utility function changes Taylor Simpson
2021-03-25 14:45 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 07/15] Hexagon (target/hexagon) use softfloat default NaN and tininess Taylor Simpson
2021-03-25 14:54 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 08/15] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Taylor Simpson
2021-03-25 14:55 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 09/15] Hexagon (target/hexagon) use softfloat for float-to-int conversions Taylor Simpson
2021-03-25 16:09 ` Richard Henderson
2021-03-25 16:17 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 10/15] Hexagon (target/hexagon) instructions with multiple definitions Taylor Simpson
2021-03-25 16:24 ` Richard Henderson
2021-03-29 21:55 ` Taylor Simpson
2021-03-25 2:50 ` [PATCH 11/15] Hexagon (target/hexagon) circular addressing Taylor Simpson
2021-03-25 16:33 ` Richard Henderson
2021-03-25 17:37 ` Taylor Simpson
2021-03-25 2:50 ` [PATCH 12/15] Hexagon (target/hexagon) bit reverse (brev) addressing Taylor Simpson
2021-03-25 16:38 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 13/15] Hexagon (target/hexagon) load and unpack bytes instructions Taylor Simpson
2021-03-25 2:50 ` [PATCH 14/15] Hexagon (target/hexagon) load into shifted register instructions Taylor Simpson
2021-03-25 16:44 ` Richard Henderson
2021-03-25 2:50 ` [PATCH 15/15] Hexagon (target/hexagon) CABAC decode bin Taylor Simpson
2021-03-25 16:54 ` Richard Henderson
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