From: Wang Xingang <wangxingang5@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
<eric.auger@redhat.com>, <shannon.zhaosl@gmail.com>,
<imammedo@redhat.com>, <mst@redhat.com>,
<marcel.apfelbaum@gmail.com>, <peter.maydell@linaro.org>,
<ehabkost@redhat.com>, <richard.henderson@linaro.org>,
<pbonzini@redhat.com>
Cc: xieyingtai@huawei.com, wangxingang5@huawei.com
Subject: [PATCH v5 2/9] hw/pxb: Add a bypass iommu property
Date: Thu, 8 Jul 2021 12:55:12 +0000 [thread overview]
Message-ID: <1625748919-52456-3-git-send-email-wangxingang5@huawei.com> (raw)
In-Reply-To: <1625748919-52456-1-git-send-email-wangxingang5@huawei.com>
From: Xingang Wang <wangxingang5@huawei.com>
Add a bypass_iommu property for pci_expander_bridge, the property
is used to indicate whether pxb root bus will bypass iommu. By
default the bypass_iommu is disabled, and it can be enabled with:
qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
---
hw/pci-bridge/pci_expander_bridge.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index aedded1064..7112dc3062 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -57,6 +57,7 @@ struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
+ bool bypass_iommu;
};
static PXBDev *convert_to_pxb(PCIDevice *dev)
@@ -255,6 +256,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
bus->map_irq = pxb_map_irq_fn;
PCI_HOST_BRIDGE(ds)->bus = bus;
+ PCI_HOST_BRIDGE(ds)->bypass_iommu = pxb->bypass_iommu;
pxb_register_bus(dev, bus, &local_err);
if (local_err) {
@@ -301,6 +303,7 @@ static Property pxb_dev_properties[] = {
/* Note: 0 is not a legal PXB bus number. */
DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
+ DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
DEFINE_PROP_END_OF_LIST(),
};
--
2.19.1
next prev parent reply other threads:[~2021-07-08 12:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 12:55 [PATCH v5 0/9] IOMMU: Add support for IOMMU Bypass Feature Wang Xingang
2021-07-08 12:55 ` [PATCH v5 1/9] hw/pci/pci_host: Allow PCI host to bypass iommu Wang Xingang
2021-07-08 12:55 ` Wang Xingang [this message]
2021-07-08 12:55 ` [PATCH v5 3/9] hw/arm/virt: Add default_bus_bypass_iommu machine option Wang Xingang
2021-07-08 12:55 ` [PATCH v5 4/9] hw/i386: Add a default_bus_bypass_iommu pc " Wang Xingang
2021-07-08 12:55 ` [PATCH v5 5/9] hw/pci: Add pci_bus_range() to get PCI bus number range Wang Xingang
2021-07-08 12:55 ` [PATCH v5 6/9] hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3 Wang Xingang
2021-07-08 12:55 ` [PATCH v5 7/9] hw/i386/acpi-build: Add DMAR support to bypass iommu Wang Xingang
2021-07-08 12:55 ` [PATCH v5 8/9] hw/i386/acpi-build: Add IVRS " Wang Xingang
2021-07-08 12:55 ` [PATCH v5 9/9] docs: Add documentation for iommu bypass Wang Xingang
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