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From: Wang Xingang <wangxingang5@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
	<eric.auger@redhat.com>, <shannon.zhaosl@gmail.com>,
	<imammedo@redhat.com>, <mst@redhat.com>,
	<marcel.apfelbaum@gmail.com>, <peter.maydell@linaro.org>,
	<ehabkost@redhat.com>, <richard.henderson@linaro.org>,
	<pbonzini@redhat.com>
Cc: xieyingtai@huawei.com, wangxingang5@huawei.com
Subject: [PATCH v5 3/9] hw/arm/virt: Add default_bus_bypass_iommu machine option
Date: Thu, 8 Jul 2021 12:55:13 +0000	[thread overview]
Message-ID: <1625748919-52456-4-git-send-email-wangxingang5@huawei.com> (raw)
In-Reply-To: <1625748919-52456-1-git-send-email-wangxingang5@huawei.com>

From: Xingang Wang <wangxingang5@huawei.com>

Add a default_bus_bypass_iommu machine option to enable/disable
bypass_iommu for default root bus. The option is disabled by
default and can be enabled with:
$QEMU -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true

Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
---
 hw/arm/virt.c         | 26 ++++++++++++++++++++++++++
 include/hw/arm/virt.h |  1 +
 2 files changed, 27 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4b96f06014..a2805977b8 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1364,6 +1364,7 @@ static void create_pcie(VirtMachineState *vms)
     }
 
     pci = PCI_HOST_BRIDGE(dev);
+    pci->bypass_iommu = vms->default_bus_bypass_iommu;
     vms->bus = pci->bus;
     if (vms->bus) {
         for (i = 0; i < nb_nics; i++) {
@@ -2319,6 +2320,21 @@ static void virt_set_iommu(Object *obj, const char *value, Error **errp)
     }
 }
 
+static bool virt_get_default_bus_bypass_iommu(Object *obj, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    return vms->default_bus_bypass_iommu;
+}
+
+static void virt_set_default_bus_bypass_iommu(Object *obj, bool value,
+                                              Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    vms->default_bus_bypass_iommu = value;
+}
+
 static CpuInstanceProperties
 virt_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
 {
@@ -2658,6 +2674,13 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
                                           "Set the IOMMU type. "
                                           "Valid values are none and smmuv3");
 
+    object_class_property_add_bool(oc, "default_bus_bypass_iommu",
+                                   virt_get_default_bus_bypass_iommu,
+                                   virt_set_default_bus_bypass_iommu);
+    object_class_property_set_description(oc, "default_bus_bypass_iommu",
+                                          "Set on/off to enable/disable "
+                                          "bypass_iommu for default root bus");
+
     object_class_property_add_bool(oc, "ras", virt_get_ras,
                                    virt_set_ras);
     object_class_property_set_description(oc, "ras",
@@ -2725,6 +2748,9 @@ static void virt_instance_init(Object *obj)
     /* Default disallows iommu instantiation */
     vms->iommu = VIRT_IOMMU_NONE;
 
+    /* The default root bus is attached to iommu by default */
+    vms->default_bus_bypass_iommu = false;
+
     /* Default disallows RAS instantiation */
     vms->ras = false;
 
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 921416f918..9661c46699 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -147,6 +147,7 @@ struct VirtMachineState {
     OnOffAuto acpi;
     VirtGICType gic_version;
     VirtIOMMUType iommu;
+    bool default_bus_bypass_iommu;
     VirtMSIControllerType msi_controller;
     uint16_t virtio_iommu_bdf;
     struct arm_boot_info bootinfo;
-- 
2.19.1



  parent reply	other threads:[~2021-07-08 13:01 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-08 12:55 [PATCH v5 0/9] IOMMU: Add support for IOMMU Bypass Feature Wang Xingang
2021-07-08 12:55 ` [PATCH v5 1/9] hw/pci/pci_host: Allow PCI host to bypass iommu Wang Xingang
2021-07-08 12:55 ` [PATCH v5 2/9] hw/pxb: Add a bypass iommu property Wang Xingang
2021-07-08 12:55 ` Wang Xingang [this message]
2021-07-08 12:55 ` [PATCH v5 4/9] hw/i386: Add a default_bus_bypass_iommu pc machine option Wang Xingang
2021-07-08 12:55 ` [PATCH v5 5/9] hw/pci: Add pci_bus_range() to get PCI bus number range Wang Xingang
2021-07-08 12:55 ` [PATCH v5 6/9] hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3 Wang Xingang
2021-07-08 12:55 ` [PATCH v5 7/9] hw/i386/acpi-build: Add DMAR support to bypass iommu Wang Xingang
2021-07-08 12:55 ` [PATCH v5 8/9] hw/i386/acpi-build: Add IVRS " Wang Xingang
2021-07-08 12:55 ` [PATCH v5 9/9] docs: Add documentation for iommu bypass Wang Xingang

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