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[174.21.71.127]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21c2d0b5763sm83798975ad.106.2025.01.21.15.12.06 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Jan 2025 15:12:06 -0800 (PST) Message-ID: <1635b7be-1c20-49ab-8e21-66f06f761c3e@linaro.org> Date: Tue, 21 Jan 2025 15:12:04 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/6] target/mips: Allocate CPU IRQs within CPUMIPSState To: qemu-devel@nongnu.org References: <20250121161817.33654-1-philmd@linaro.org> <20250121161817.33654-7-philmd@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20250121161817.33654-7-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/21/25 08:18, Philippe Mathieu-Daudé wrote: > There are always 8 IRQs created with a MIPS CPU. > Allocate their state once in CPUMIPSState, initialize > them in place in cpu_mips_irq_init_cpu(). Update hw/ uses. > > Move cpu_mips_irq_init_cpu() declaration from "cpu.h" > to "internal.h", as it shouldn't be accessible from hw/. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/mips/cpu.h | 4 ++-- > target/mips/internal.h | 2 ++ > hw/intc/mips_gic.c | 4 ++-- > hw/mips/fuloong2e.c | 4 ++-- > hw/mips/jazz.c | 6 +++--- > hw/mips/loongson3_virt.c | 4 ++-- > hw/mips/malta.c | 4 ++-- > hw/mips/mipssim.c | 4 ++-- > target/mips/system/cp0_timer.c | 4 ++-- > target/mips/system/interrupts.c | 11 +++-------- > 10 files changed, 22 insertions(+), 25 deletions(-) Why move into CPUMIPSState and not MIPSCPU? Is it because that's where irq[8] is currently? I guess it doesn't matter much either way. Reviewed-by: Richard Henderson r~