From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1BAEC433F5 for ; Wed, 1 Dec 2021 08:18:59 +0000 (UTC) Received: from localhost ([::1]:35512 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1msKpO-0008KD-Ke for qemu-devel@archiver.kernel.org; Wed, 01 Dec 2021 03:18:58 -0500 Received: from eggs.gnu.org ([209.51.188.92]:44596) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1msKn8-0005ea-Cu for qemu-devel@nongnu.org; Wed, 01 Dec 2021 03:16:38 -0500 Received: from mail.loongson.cn ([114.242.206.163]:59028 helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1msKn4-0007vx-3Z for qemu-devel@nongnu.org; Wed, 01 Dec 2021 03:16:38 -0500 Received: from kvm-dev1.localdomain (unknown [10.2.5.134]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9AxaslZL6dhBv8BAA--.4388S2; Wed, 01 Dec 2021 16:16:25 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Subject: [PATCH v12 00/26] Add LoongArch linux-user emulation support Date: Wed, 1 Dec 2021 16:15:59 +0800 Message-Id: <1638346585-3436-1-git-send-email-gaosong@loongson.cn> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf9AxaslZL6dhBv8BAA--.4388S2 X-Coremail-Antispam: 1UD129KBjvJXoW3Ww45Ar15Gw45tF17GFyfZwb_yoW3WF4xpr W3ur15Kw48GrZ7Jrsagay5XryrXa1xGr4293WSq3s5CrWIvryfZF1kK3sxKFy3X3W0gry0 qFnYkw1UWF4UXa7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Based-on: https://patchew.org/QEMU/1637893388-10282-1-git-send-email-gaosong@loongson.cn/ Hi all, This series only support linux-user emulation. More about LoongArch at: https://github.com/loongson/ The latest kernel: * https://github.com/loongson/linux/tree/loongarch-next Patches need review: * 0016-target-loongarch-Add-disassembler.patch * 0018-linux-user-Add-LoongArch-specific-structures.patch * 0019-linux-user-Add-LoongArch-signal-support.patch Changes for v12: * Clean up code. Changes for v11: * Clean up insns.decode. Changes for v10: * Delete format_insn(), use output_XXX. Changes for v9: * Use GPL-2.0+ SPDX license identifier. * Move set_loongarch_cpucfg() in loongarch_3a5000_initfn(). * target/loongarch/insn_trans/trans_xxx.c rename to target/loongarch/insn_trans/trans_xxx.c.inc. * Split host_signal_pc and host_signal_write out of user-exec.c. Changes for v8: * Use the FIELD functions to define cpucfg[i]. * Re-use the decodetree to disassembler description. * Split v7 patch(0017-LoongArch-Linux-User-Emulation.patch). Changes for v7: * scripts/gensyscalls.sh support loongarch64 if we use gensyscalls.sh, we need disable __BITS_PER_LONG at arch/loongarch/include/uapi/asm/bitsperlong.h V11: https://patchew.org/QEMU/1637302410-24632-1-git-send-email-gaosong@loongson.cn/ Please review! Thanks. Song Gao (26): target/loongarch: Add README target/loongarch: Add core definition target/loongarch: Add main translation routines target/loongarch: Add fixed point arithmetic instruction translation target/loongarch: Add fixed point shift instruction translation target/loongarch: Add fixed point bit instruction translation target/loongarch: Add fixed point load/store instruction translation target/loongarch: Add fixed point atomic instruction translation target/loongarch: Add fixed point extra instruction translation target/loongarch: Add floating point arithmetic instruction translation target/loongarch: Add floating point comparison instruction translation target/loongarch: Add floating point conversion instruction translation target/loongarch: Add floating point move instruction translation target/loongarch: Add floating point load/store instruction translation target/loongarch: Add branch instruction translation target/loongarch: Add disassembler linux-user: Add LoongArch generic header files linux-user: Add LoongArch specific structures linux-user: Add LoongArch signal support linux-user: Add LoongArch elf support linux-user: Add LoongArch syscall support linux-user: Add LoongArch cpu_loop support default-configs: Add loongarch linux-user support target/loongarch: Add target build suport target/loongarch: 'make check-tcg' support scripts: add loongarch64 binfmt config MAINTAINERS | 5 + configs/targets/loongarch64-linux-user.mak | 3 + configure | 5 + include/disas/dis-asm.h | 2 + include/elf.h | 2 + linux-user/elfload.c | 58 ++ linux-user/loongarch64/cpu_loop.c | 94 +++ linux-user/loongarch64/signal.c | 198 ++++++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 313 +++++++++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 47 ++ linux-user/loongarch64/target_syscall.h | 44 ++ linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 10 +- meson.build | 3 +- scripts/gensyscalls.sh | 1 + scripts/qemu-binfmt-conf.sh | 6 +- target/loongarch/README | 76 +++ target/loongarch/cpu-param.h | 18 + target/loongarch/cpu.c | 314 +++++++++ target/loongarch/cpu.h | 252 +++++++ target/loongarch/disas.c | 612 +++++++++++++++++ target/loongarch/fpu_helper.c | 862 ++++++++++++++++++++++++ target/loongarch/helper.h | 94 +++ target/loongarch/insn_trans/trans_arith.c.inc | 304 +++++++++ target/loongarch/insn_trans/trans_atomic.c.inc | 136 ++++ target/loongarch/insn_trans/trans_bit.c.inc | 211 ++++++ target/loongarch/insn_trans/trans_branch.c.inc | 83 +++ target/loongarch/insn_trans/trans_extra.c.inc | 86 +++ target/loongarch/insn_trans/trans_farith.c.inc | 105 +++ target/loongarch/insn_trans/trans_fcmp.c.inc | 56 ++ target/loongarch/insn_trans/trans_fcnv.c.inc | 33 + target/loongarch/insn_trans/trans_fmemory.c.inc | 153 +++++ target/loongarch/insn_trans/trans_fmov.c.inc | 157 +++++ target/loongarch/insn_trans/trans_memory.c.inc | 229 +++++++ target/loongarch/insn_trans/trans_shift.c.inc | 106 +++ target/loongarch/insns.decode | 442 ++++++++++++ target/loongarch/internals.h | 28 + target/loongarch/meson.build | 19 + target/loongarch/op_helper.c | 86 +++ target/loongarch/translate.c | 268 ++++++++ target/loongarch/translate.h | 45 ++ target/meson.build | 1 + tests/tcg/configure.sh | 1 + 49 files changed, 5666 insertions(+), 6 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 target/loongarch/README create mode 100644 target/loongarch/cpu-param.h create mode 100644 target/loongarch/cpu.c create mode 100644 target/loongarch/cpu.h create mode 100644 target/loongarch/disas.c create mode 100644 target/loongarch/fpu_helper.c create mode 100644 target/loongarch/helper.h create mode 100644 target/loongarch/insn_trans/trans_arith.c.inc create mode 100644 target/loongarch/insn_trans/trans_atomic.c.inc create mode 100644 target/loongarch/insn_trans/trans_bit.c.inc create mode 100644 target/loongarch/insn_trans/trans_branch.c.inc create mode 100644 target/loongarch/insn_trans/trans_extra.c.inc create mode 100644 target/loongarch/insn_trans/trans_farith.c.inc create mode 100644 target/loongarch/insn_trans/trans_fcmp.c.inc create mode 100644 target/loongarch/insn_trans/trans_fcnv.c.inc create mode 100644 target/loongarch/insn_trans/trans_fmemory.c.inc create mode 100644 target/loongarch/insn_trans/trans_fmov.c.inc create mode 100644 target/loongarch/insn_trans/trans_memory.c.inc create mode 100644 target/loongarch/insn_trans/trans_shift.c.inc create mode 100644 target/loongarch/insns.decode create mode 100644 target/loongarch/internals.h create mode 100644 target/loongarch/meson.build create mode 100644 target/loongarch/op_helper.c create mode 100644 target/loongarch/translate.c create mode 100644 target/loongarch/translate.h -- 1.8.3.1