Re: [PATCH] target/riscv: use xlen in forging isa string

[Richard Henderson <richard.henderson@linaro.org>]

On 4/9/22 02:46, Frédéric Pétrot wrote:
> Since we now have xlen in misa, let's not use TARGET_LONG_BITS while
> forging the isa string, and use instead riscv_cpu_mxl_bits.
> 
> Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
> ---
>   target/riscv/cpu.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 0c774056c5..0644b3843e 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -984,7 +984,8 @@ char *riscv_isa_string(RISCVCPU *cpu)
>       int i;
>       const size_t maxlen = sizeof("rv128") + sizeof(riscv_single_letter_exts);
>       char *isa_str = g_new(char, maxlen);
> -    char *p = isa_str + snprintf(isa_str, maxlen, "rv%d", TARGET_LONG_BITS);
> +    char *p = isa_str + snprintf(isa_str, maxlen, "rv%lu",
> +                                 riscv_cpu_mxl_bits(&cpu->env));

The fact that you need to use %lu here means riscv_cpu_mxl_bits needs fixing: use of 
unsigned long is always a mistake in QEMU.  Either int is fine (as in this case), or you 
need uint64_t and ULL.


r~