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From: Aditya Gupta <adityag@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, "Frédéric Barrat" <fbarrat@linux.ibm.com>,
	"Sourabh Jain" <sourabhjain@linux.ibm.com>,
	"Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
	"Hari Bathini" <hbathini@linux.ibm.com>
Subject: Re: [PATCH 0/7] Implement MPIPL for PowerNV
Date: Thu, 27 Feb 2025 11:53:25 +0530	[thread overview]
Message-ID: <171ee322-e41e-42b2-816d-b45fde796874@linux.ibm.com> (raw)
In-Reply-To: <D82WY0RYB30R.3M0B68UOLV0EK@gmail.com>

Hi Nick,

On 27/02/25 09:07, Nicholas Piggin wrote:
> On Mon Feb 17, 2025 at 5:19 PM AEST, Aditya Gupta wrote:
>> Overview
>> =========
>>
>> Implemented MPIPL (Memory Preserving IPL, aka fadump) on PowerNV machine
>> in QEMU.
> Wow, that's a lot of effort.

Thanks Nick.


>> Note: It's okay if this isn't merged as there might be less users. Sending
>> for archieval purpose, as the patches can be referred for how fadump/mpipl
>> can be implemented in baremetal/PowerNV/any other arch QEMU.
> I would like to add it. It helps test a bunch of code that is in Linux
> and skiboot, so it would be quite useful. A functional test would be
> important to have.

Sure, it's not complete yet (didn't implement the CPU saving part) as I 
just wanted to do a experiment I did, will improve those things by v2 
then. It might take some time though.

Will look into the functional test thing also.

> I've had a glance through it, but better review might have to wait for
> until the next development cycle.

Sure, that's totally okay. Thank you for looking at it.


Thanks,

- Aditya G

> Thanks,
> Nick


      reply	other threads:[~2025-02-27  6:24 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-17  7:19 [PATCH 0/7] Implement MPIPL for PowerNV Aditya Gupta
2025-02-17  7:19 ` [PATCH 1/7] hw/ppc: Log S0/S1 Interrupt triggers by OPAL Aditya Gupta
2025-03-11  4:38   ` Harsh Prateek Bora
2025-03-13 18:43     ` Aditya Gupta
2025-02-17  7:19 ` [PATCH 2/7] hw/ppc: Implement S0 SBE interrupt as cpu_pause then host reset Aditya Gupta
2025-03-11  4:45   ` Harsh Prateek Bora
2025-03-13 18:45     ` Aditya Gupta
2025-02-17  7:19 ` [PATCH 3/7] hw/ppc: Handle stash command in PowerNV SBE Aditya Gupta
2025-03-11  4:50   ` Harsh Prateek Bora
2025-03-13 18:46     ` Aditya Gupta
2025-02-17  7:19 ` [PATCH 4/7] hw/ppc: Add MDST/MDDT/MDRT table structures and offsets Aditya Gupta
2025-03-11  5:11   ` Harsh Prateek Bora
2025-03-13 18:50     ` Aditya Gupta
2025-02-17  7:19 ` [PATCH 5/7] hw/ppc: Preserve Memory Regions as per MDST/MDDT tables Aditya Gupta
2025-03-11  5:18   ` Harsh Prateek Bora
2025-03-13 18:54     ` Aditya Gupta
2025-02-17  7:19 ` [PATCH 6/7] hw/ppc: [WIP] Add Processor Dump Area offsets in Pnv SBE Aditya Gupta
2025-03-11  5:23   ` Harsh Prateek Bora
2025-03-13 18:56     ` Aditya Gupta
2025-02-17  7:19 ` [PATCH 7/7] hw/ppc: Implement MPIPL in PowerNV Aditya Gupta
2025-03-11  5:41   ` Harsh Prateek Bora
2025-03-13 19:00     ` Aditya Gupta
2025-02-27  3:37 ` [PATCH 0/7] Implement MPIPL for PowerNV Nicholas Piggin
2025-02-27  6:23   ` Aditya Gupta [this message]

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