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Fri, 26 Jan 2024 02:44:08 -0800 (PST) Message-ID: <17455043-25cf-4978-afdd-147e689a1abd@linaro.org> Date: Fri, 26 Jan 2024 11:44:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] target/arm: Move v7m-related code from cpu32.c into a separate file Content-Language: en-US To: Thomas Huth , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , Fabiano Rosas References: <20240126084001.879548-1-thuth@redhat.com> <20240126084001.879548-2-thuth@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240126084001.879548-2-thuth@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::12f; envelope-from=philmd@linaro.org; helo=mail-lf1-x12f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Thomas, On 26/1/24 09:39, Thomas Huth wrote: > Move the code to a separate file so that we do not have to compile > it anymore if CONFIG_ARM_V7M is not set. > > Signed-off-by: Thomas Huth > --- > target/arm/tcg/cpu-v7m.c | 292 +++++++++++++++++++++++++++++++++++++ > target/arm/tcg/cpu32.c | 261 --------------------------------- > target/arm/tcg/meson.build | 4 + > 3 files changed, 296 insertions(+), 261 deletions(-) > create mode 100644 target/arm/tcg/cpu-v7m.c > > diff --git a/target/arm/tcg/cpu-v7m.c b/target/arm/tcg/cpu-v7m.c > new file mode 100644 > index 0000000000..d61873ab6d > --- /dev/null > +++ b/target/arm/tcg/cpu-v7m.c > @@ -0,0 +1,292 @@ > +/* > + * QEMU ARM V7 TCG-only CPUs. s/V7/v7M/ > + * > + * Copyright (c) 2012 SUSE LINUX Products GmbH > + * > + * This code is licensed under the GNU GPL v2 or later. > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ > + > +#include "qemu/osdep.h" > +#include "cpu.h" > +#include "hw/core/tcg-cpu-ops.h" > +#include "internals.h" > +#include "hw/intc/armv7m_nvic.h" > + > +/* CPU models. These are not needed for the AArch64 linux-user build. */ > +#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) Could we do that in meson instead? > diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build > index 6fca38f2cc..8c7f6b43f3 100644 > --- a/target/arm/tcg/meson.build > +++ b/target/arm/tcg/meson.build > @@ -52,6 +52,10 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files( > 'sve_helper.c', > )) > > +arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files( -> arm_system_ss > + 'cpu-v7m.c' > +))