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Tsirkin" , Marcel Apfelbaum , Peter Xu , Fabiano Rosas , Steve Sistare Subject: [PATCH V5 10/38] pci: skip reset during cpr Date: Tue, 10 Jun 2025 08:39:23 -0700 Message-Id: <1749569991-25171-11-git-send-email-steven.sistare@oracle.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1749569991-25171-1-git-send-email-steven.sistare@oracle.com> References: <1749569991-25171-1-git-send-email-steven.sistare@oracle.com> X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-10_07,2025-06-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 bulkscore=0 malwarescore=0 mlxscore=0 mlxlogscore=999 phishscore=0 spamscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2505160000 definitions=main-2506100125 X-Authority-Analysis: v=2.4 cv=LIpmQIW9 c=1 sm=1 tr=0 ts=684851d8 b=1 cx=c_pps a=e1sVV491RgrpLwSTMOnk8w==:117 a=e1sVV491RgrpLwSTMOnk8w==:17 a=6IFa9wvqVegA:10 a=yPCof4ZbAAAA:8 a=9sbxz00wAFZublB0PowA:9 cc=ntf awl=host:14714 X-Proofpoint-ORIG-GUID: rRW8Tlqh5UfDfSPDAIYE-1uvnmrGDIKn X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjEwMDEyNiBTYWx0ZWRfX6o5jhaiwoN15 y6TOan90+EaAK5kYaldTjD7DTRWV+SLF2gKnWf9XRezs8NEo/DmxWERfIBpFMcIz51MbUIydIBW SfHJubxGODZ0RYHYFWDsQqFvAlAUJSnXhkfBHHzE+i9CHnbv4FFG2dwe1ObO5qYHAZ/McgLSTO/ 6QGsKOz72RLj1zrlheu1IZXjKmc1vgTCCcdKt++0UfJB498dR+j4+aKNLr6swC7Hvl7EovME54v RH2sgXm5XDdygK0Zt1BfyuvsEfmotl6YN+C1Oxk/Rwn/LNfTiDJN6agNcg1b6vbM0Mn7SFC0vY/ 7YP+fYlFpDUF8U8beduvRI2kMCi/Uw3XUFekyzvoFeG9gNonoQAN0nRhC6qWST3KgRq/oyugwvw cOv+xzLzuz67oKVwXl7MuqW/xMueTufLd8R99i8oRoEZkIaAt6n2efiFSGOwbIXKwRxc4PiZ X-Proofpoint-GUID: rRW8Tlqh5UfDfSPDAIYE-1uvnmrGDIKn Received-SPF: pass client-ip=205.220.177.32; envelope-from=steven.sistare@oracle.com; helo=mx0b-00069f02.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Do not reset a vfio-pci device during CPR. Signed-off-by: Steve Sistare --- include/hw/pci/pci_device.h | 3 +++ hw/pci/pci.c | 5 +++++ hw/vfio/pci.c | 7 +++++++ 3 files changed, 15 insertions(+) diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index eee0338..0509430 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -182,6 +182,9 @@ struct PCIDevice { uint32_t max_bounce_buffer_size; char *sriov_pf; + + /* CPR */ + bool skip_reset_on_cpr; }; static inline int pci_intx(PCIDevice *pci_dev) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 9b4bf48..0f6b9b3 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -32,6 +32,7 @@ #include "hw/pci/pci_host.h" #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" +#include "migration/cpr.h" #include "migration/qemu-file-types.h" #include "migration/vmstate.h" #include "net/net.h" @@ -537,6 +538,10 @@ static void pci_reset_regions(PCIDevice *dev) static void pci_do_device_reset(PCIDevice *dev) { + if (dev->skip_reset_on_cpr && cpr_is_incoming()) { + return; + } + pci_device_deassert_intx(dev); assert(dev->irq_state == 0); diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index b1250d8..819170d 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3408,6 +3408,13 @@ static void vfio_instance_init(Object *obj) /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command * line, therefore, no need to wait to realize like other devices */ pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; + + /* + * A device that is resuming for cpr is already configured, so do not + * reset it during qemu_system_reset prior to cpr load, else interrupts + * may be lost. + */ + pci_dev->skip_reset_on_cpr = true; } static void vfio_pci_base_dev_class_init(ObjectClass *klass, const void *data) -- 1.8.3.1