From: Paolo Bonzini <pbonzini@redhat.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: qemu-devel@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH] target-i386: fix confusion in xcr0 bit position vs. mask
Date: Tue, 23 Feb 2016 05:16:55 -0500 (EST) [thread overview]
Message-ID: <175894647.27918982.1456222615943.JavaMail.zimbra@redhat.com> (raw)
In-Reply-To: <20160222215603.GB3901@thinpad.lan.raisama.net>
----- Original Message -----
> From: "Eduardo Habkost" <ehabkost@redhat.com>
> To: "Richard Henderson" <rth@twiddle.net>
> Cc: "Paolo Bonzini" <pbonzini@redhat.com>, qemu-devel@nongnu.org
> Sent: Monday, February 22, 2016 10:56:03 PM
> Subject: Re: [PATCH] target-i386: fix confusion in xcr0 bit position vs. mask
>
> On Mon, Feb 22, 2016 at 11:14:44AM -0800, Richard Henderson wrote:
> > On 02/22/2016 02:19 AM, Paolo Bonzini wrote:
> > > The xsave and xrstor helpers are accessing the x86_ext_save_areas array
> > > using a bit mask instead of a bit position. Provide two sets of XSTATE_*
> > > definitions and use XSTATE_*_BIT when a bit position is requested.
> >
> > Whoops. This patch is fine,
> >
> > Reviewed-by: Richard Henderson <rth@twiddle.net>
> >
> > Dosen't Eduardo have a pending patch set to make xsave use a struct? That
> > would fix this as well, by not requiring fpu_helper.c to use the
> > x86_ext_save_areas array at all...
>
> That's true, but the bug fix have priority, so I will queue it
> first.
Actually, I'm sending out a pull request today so I was thinking of
including this.
Paolo
next prev parent reply other threads:[~2016-02-23 10:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-22 10:19 [Qemu-devel] [PATCH] target-i386: fix confusion in xcr0 bit position vs. mask Paolo Bonzini
2016-02-22 19:14 ` Richard Henderson
2016-02-22 21:56 ` Eduardo Habkost
2016-02-23 10:16 ` Paolo Bonzini [this message]
2016-02-23 18:50 ` Eduardo Habkost
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