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Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 26/37] target/i386: reimplement 0x0f 0x3a, add AVX Content-Language: en-US To: Paolo Bonzini , qemu-devel@nongnu.org References: <20220911230418.340941-1-pbonzini@redhat.com> <20220911230418.340941-27-pbonzini@redhat.com> From: Richard Henderson In-Reply-To: <20220911230418.340941-27-pbonzini@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.153, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/12/22 00:04, Paolo Bonzini wrote: > @@ -839,6 +910,10 @@ static bool decode_insn(DisasContext *s, CPUX86State *env, X86DecodeFunc decode_ > } > } > if (e->op3 != X86_TYPE_None) { > + /* > + * A couple instructions actually use the extra immediate byte for an Lx > + * register operand; those are handled in the gen_* functions as one off. > + */ > assert(e->op3 == X86_TYPE_I && e->s3 == X86_SIZE_b); > s->rip_offset += 1; > } Comment should be squashed back with the code. > +static inline void gen_binary_imm_sse(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode, > + SSEFunc_0_epppi xmm, SSEFunc_0_epppi ymm) > +{ > + TCGv_i32 imm = tcg_const_i32(decode->immediate); tcg_constant_i32. > +static inline void gen_unary_imm_fp_sse(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode, > + SSEFunc_0_eppi xmm, SSEFunc_0_eppi ymm) > +{ > + TCGv_i32 imm = tcg_const_i32(decode->immediate); Likewise. > +static void gen_PALIGNR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) > +{ > + TCGv_i32 imm = tcg_const_i32(decode->immediate); Likewise, but could simply be implemented with inline with extract2. > +static void gen_PCMPESTRI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) > +{ > + TCGv_i32 imm = tcg_const_i32(decode->immediate); tcg_constant_i32. > +static void gen_PCMPESTRM(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) > +{ > + TCGv_i32 imm = tcg_const_i32(decode->immediate); Likewise. > static void gen_PCMPGTB(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) > { > int vec_len = sse_vec_len(s, decode); > tcg_gen_ld8u_tl(s->T0, s->ptr1, offsetof(ZMMReg, ZMM_B(val))); > + break; > + case MO_16: > + tcg_gen_ld16u_tl(s->T0, s->ptr1, offsetof(ZMMReg, ZMM_W(val))); > + break; Mailer breakage? > + if (new_mask != 15) { > + if ((val >> 0) & 1) > + tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(0))); > + if ((val >> 1) & 1) > + tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(1))); > + if ((val >> 2) & 1) > + tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(2))); > + if ((val >> 3) & 1) > + tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(3))); > + } Missing braces. r~