From: sridhar kulkarni <sridhar_kulk@yahoo.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Peter Crosthwaite <crosthwaitepeter@gmail.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Alistair Francis <alistair.francis@xilinx.com>
Subject: Re: [Qemu-devel] qemu-system-arm system support for big endian BE8
Date: Sat, 24 Oct 2015 03:47:52 +0000 (UTC) [thread overview]
Message-ID: <1789016264.2468642.1445658472213.JavaMail.yahoo@mail.yahoo.com> (raw)
In-Reply-To: <CAFEAcA99xvn=wjUX9AycWNrx7GzNiO5vdpXjYoMYk=1nUPhiJw@mail.gmail.com>
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Hi Peter,
I further debugged this issues,
Arround line 5000 of file helper.c, I guess updation of uncached_cpsrwas not proper. I changed following line FROM env->uncached_cpsr = (env->uncached_cpsr & !(CPSR_E)) | (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE ? CPSR_E : 0); TO env->uncached_cpsr = (env->uncached_cpsr & ~(CPSR_E)) | (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE ? CPSR_E : 0);
This fixed the crash that I reported earlier. With this my application is up and running. I am not sure if this is the right fix, but wanted to share this with you and get the feedback.
RegardsSridhar
On Friday, October 23, 2015 5:26 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
On 23 October 2015 at 12:11, sridhar kulkarni <sridhar_kulk@yahoo.com> wrote:
> Hi,
>
> Floating point exception error was the result of a divide by zero in the
> application. That is now solved and I was able to progress pretty well with
> Big Endinan code.
> Currently QEMU crashes during handling interrupt controller.
>
> Following the dump that I captured.
>
> ----------------
> IN:
> 0xe003b47c: 68e0 ldr r0, [r4, #12]
> 0xe003b47e: b110 cbz r0, 0xe003b486
> Trace 0x7f1af25f8410 [e003b47c]
> R00=00000001 R01=0001c200 R02=00000001 R03=c16890e8
> R04=c16890e8 R05=e003b18c R06=00000080 R07=0000a000
> R08=ffffffff R09=00000001 R10=0001c200 R11=00000000
> R12=00000000 R13=c1c3a320 R14=e003b33d R15=e003b47c
> PSR=20000133 --C- T svc32
> ----------------
> IN:
> 0xe003b486: f8d4 b01c ldr.w fp, [r4, #28]
> 0xe003b48a: f44f 5180 mov.w r1, #4096 ; 0x1000
> 0xe003b48e: f241 1021 movw r0, #4385 ; 0x1121
> 0xe003b492: f8ab 1000 strh.w r1, [fp]
> 0xe003b496: f64f 4100 movw r1, #64512 ; 0xfc00
> 0xe003b49a: f2c7 4102 movt r1, #29698 ; 0x7402
> 0xe003b49e: 8008 strh r0, [r1, #0]
> 0xe003b4a0: f242 1012 movw r0, #8466 ; 0x2112
> 0xe003b4a4: 8048 strh----------------
> IN:
> 0x00000194: e121f000 msr CPSR_c, r0
> Trace 0x7f1af259c000 [00000194]
> R00=8000039f R01=80000380 R02=770004c8 R03=80000380
> R04=00000148 R05=00000000 R06=c16890e8 R07=00000001
> R08=00000001 R09=00000000 R10=00000000 R11=c16746e1
> R12=00000000 R13=00004b80 R14=00000188 R15=00000194
> PSR=80000380 N--- A usr26
Your dump seems to be incomplete, but here you are about
to try to execute an instruction, but somehow the CPSR
value is wrong (0x80000380, which is an invalid mode field
of 0.) QEMU then complains about it.
The obvious guess is that your code has a bug in it somewhere;
you should debug it to find out why it is corrupting the CPSR.
thanks
-- PMM
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next prev parent reply other threads:[~2015-10-24 3:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-08 17:25 [Qemu-devel] qemu-system-arm system support for big endian BE8 sridhar kulkarni
2015-09-09 5:12 ` sridhar kulkarni
2015-09-10 17:07 ` Peter Crosthwaite
2015-09-23 10:48 ` sridhar kulkarni
2015-09-23 15:41 ` Peter Maydell
2015-09-24 2:53 ` Peter Crosthwaite
2015-09-24 10:48 ` sridhar kulkarni
2015-09-24 16:17 ` Peter Crosthwaite
2015-10-23 11:11 ` sridhar kulkarni
2015-10-23 11:55 ` Peter Maydell
2015-10-24 3:47 ` sridhar kulkarni [this message]
2015-10-24 4:34 ` Peter Crosthwaite
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