From: Paolo Bonzini <pbonzini@redhat.com>
To: Jingqi Liu <jingqi.liu@intel.com>
Cc: rth@twiddle.net, ehabkost@redhat.com, mtosatti@redhat.com,
qemu-devel@nongnu.org, wei.w.wang@intel.com
Subject: Re: [Qemu-devel] [PATCH] i386: Add support to get/set/migrate MSR (33H)
Date: Wed, 4 Jul 2018 15:39:34 +0200 [thread overview]
Message-ID: <17a63c95-8deb-1112-ca11-f98ee7f5876e@redhat.com> (raw)
In-Reply-To: <1530710466-88309-1-git-send-email-jingqi.liu@intel.com>
On 04/07/2018 15:21, Jingqi Liu wrote:
> The MSR (33H) controls support for #AC exception
> for split locked accesses. When bit 29 of the MSR (33H)
> is set, the processor causes an #AC exception to
> be issued instead of suppressing LOCK on bus
> (during split lock access).
>
> Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
> ---
> target/i386/cpu.h | 2 ++
> target/i386/kvm.c | 13 +++++++++++++
> target/i386/machine.c | 20 ++++++++++++++++++++
> 3 files changed, 35 insertions(+)
>
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 8eaefee..9728552 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -348,6 +348,7 @@ typedef enum X86Seg {
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_EXTD (1 << 10)
> #define MSR_IA32_APICBASE_BASE (0xfffffU<<12)
> +#define MSR_SPLIT_LOCK_CTRL 0x00000033
> #define MSR_IA32_FEATURE_CONTROL 0x0000003a
> #define MSR_TSC_ADJUST 0x0000003b
> #define MSR_IA32_SPEC_CTRL 0x48
> @@ -1209,6 +1210,7 @@ typedef struct CPUX86State {
> uint32_t pkru;
>
> uint64_t spec_ctrl;
> + uint64_t split_lock_ctrl;
Please call everything MSR_TEST_CTL or test_ctl. Yes, it's a horrible
name, but if that's what the manual calls it, we should do the same.
Thanks,
Paolo
> uint64_t virt_ssbd;
>
> /* End of state preserved by INIT (dummy marker). */
> diff --git a/target/i386/kvm.c b/target/i386/kvm.c
> index 032f0ad..043ca9b 100644
> --- a/target/i386/kvm.c
> +++ b/target/i386/kvm.c
> @@ -92,6 +92,7 @@ static bool has_msr_hv_frequencies;
> static bool has_msr_hv_reenlightenment;
> static bool has_msr_xss;
> static bool has_msr_spec_ctrl;
> +static bool has_msr_split_lock_ctrl;
> static bool has_msr_virt_ssbd;
> static bool has_msr_smi_count;
>
> @@ -1272,6 +1273,9 @@ static int kvm_get_supported_msrs(KVMState *s)
> case MSR_IA32_SPEC_CTRL:
> has_msr_spec_ctrl = true;
> break;
> + case MSR_SPLIT_LOCK_CTRL:
> + has_msr_split_lock_ctrl = true;
> + break;
> case MSR_VIRT_SSBD:
> has_msr_virt_ssbd = true;
> break;
> @@ -1786,6 +1790,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
> if (has_msr_spec_ctrl) {
> kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl);
> }
> + if (has_msr_split_lock_ctrl) {
> + kvm_msr_entry_add(cpu, MSR_SPLIT_LOCK_CTRL, env->split_lock_ctrl);
> + }
> if (has_msr_virt_ssbd) {
> kvm_msr_entry_add(cpu, MSR_VIRT_SSBD, env->virt_ssbd);
> }
> @@ -2169,6 +2176,9 @@ static int kvm_get_msrs(X86CPU *cpu)
> if (has_msr_spec_ctrl) {
> kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0);
> }
> + if (has_msr_split_lock_ctrl) {
> + kvm_msr_entry_add(cpu, MSR_SPLIT_LOCK_CTRL, 0);
> + }
> if (has_msr_virt_ssbd) {
> kvm_msr_entry_add(cpu, MSR_VIRT_SSBD, 0);
> }
> @@ -2551,6 +2561,9 @@ static int kvm_get_msrs(X86CPU *cpu)
> case MSR_IA32_SPEC_CTRL:
> env->spec_ctrl = msrs[i].data;
> break;
> + case MSR_SPLIT_LOCK_CTRL:
> + env->split_lock_ctrl = msrs[i].data;
> + break;
> case MSR_VIRT_SSBD:
> env->virt_ssbd = msrs[i].data;
> break;
> diff --git a/target/i386/machine.c b/target/i386/machine.c
> index 4d98d36..c82dc0d 100644
> --- a/target/i386/machine.c
> +++ b/target/i386/machine.c
> @@ -935,6 +935,25 @@ static const VMStateDescription vmstate_msr_virt_ssbd = {
> }
> };
>
> +static bool split_lock_ctrl_needed(void *opaque)
> +{
> + X86CPU *cpu = opaque;
> + CPUX86State *env = &cpu->env;
> +
> + return env->split_lock_ctrl != 0;
> +}
> +
> +static const VMStateDescription vmstate_split_lock_ctrl = {
> + .name = "cpu/split_lock_ctrl",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .needed = split_lock_ctrl_needed,
> + .fields = (VMStateField[]){
> + VMSTATE_UINT64(env.split_lock_ctrl, X86CPU),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> VMStateDescription vmstate_x86_cpu = {
> .name = "cpu",
> .version_id = 12,
> @@ -1059,6 +1078,7 @@ VMStateDescription vmstate_x86_cpu = {
> &vmstate_mcg_ext_ctl,
> &vmstate_msr_intel_pt,
> &vmstate_msr_virt_ssbd,
> + &vmstate_split_lock_ctrl,
> NULL
> }
> };
>
next prev parent reply other threads:[~2018-07-04 13:39 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-04 13:21 [Qemu-devel] [PATCH] i386: Add support to get/set/migrate MSR (33H) Jingqi Liu
2018-07-04 13:39 ` Paolo Bonzini [this message]
2018-07-06 8:32 ` Liu, Jingqi
2018-07-04 19:43 ` Eduardo Habkost
2018-07-06 8:38 ` Liu, Jingqi
2018-07-06 8:43 ` Daniel P. Berrangé
2018-07-06 9:31 ` Paolo Bonzini
2018-07-06 11:42 ` Eduardo Habkost
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