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Wed, 18 Aug 2021 18:16:39 -0700 (PDT) Received: from [192.168.3.43] ([173.197.107.15]) by smtp.gmail.com with ESMTPSA id b5sm980604pjq.2.2021.08.18.18.16.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Aug 2021 18:16:38 -0700 (PDT) Subject: Re: [PATCH v2 04/21] target/riscv: Introduce DisasExtend and new helpers To: Bin Meng References: <20210817211803.283639-1-richard.henderson@linaro.org> <20210817211803.283639-5-richard.henderson@linaro.org> From: Richard Henderson Message-ID: <17aa85ef-b5b9-0bf8-dc81-c65b88440c5b@linaro.org> Date: Wed, 18 Aug 2021 15:16:34 -1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.961, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Bin Meng , Alistair Francis , "qemu-devel@nongnu.org Developers" , liuzhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/18/21 12:58 AM, Bin Meng wrote: >> +static void gen_set_gpr(DisasContext *ctx, int reg_num, TCGv t) >> +{ >> + if (reg_num != 0) { >> + if (ctx->w) { >> + tcg_gen_ext32s_tl(cpu_gpr[reg_num], t); > > What about zero extension? All of the RV64 word instructions sign-extend the result. >> void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) >> { >> - DisasContext ctx; >> + DisasContext ctx = { }; > > Why is this change? I believe we should explicitly initialize the ctx > in riscv_tr_init_disas_context() I considered it easier to zero-init the whole thing here. r~