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From: Francesco Lavra <francescolavra.fl@gmail.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Riku Voipio <riku.voipio@iki.fi>,
	Richard Henderson <richard.henderson@linaro.org>,
	Zhao Liu <zhao1.liu@intel.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Ani Sinha <anisinha@redhat.com>
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Cornelia Huck" <cohuck@redhat.com>,
	"Daniel P. Berrangé" <berrange@redhat.com>,
	"Eric Blake" <eblake@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	rick.p.edgecombe@intel.com, kvm@vger.kernel.org,
	qemu-devel@nongnu.org
Subject: Re: [PATCH v6 60/60] docs: Add TDX documentation
Date: Tue, 12 Nov 2024 11:17:25 +0100	[thread overview]
Message-ID: <17f00e24648b3f4f2ad5b941d848ca1d1fc075ae.camel@gmail.com> (raw)
In-Reply-To: <20241105062408.3533704-61-xiaoyao.li@intel.com>

On Tue, 2024-11-05 at 01:24 -0500, Xiaoyao Li wrote:

> diff --git a/docs/system/confidential-guest-support.rst
> b/docs/system/confidential-guest-support.rst
> index 0c490dbda2b7..66129fbab64c 100644
> --- a/docs/system/confidential-guest-support.rst
> +++ b/docs/system/confidential-guest-support.rst
> @@ -38,6 +38,7 @@ Supported mechanisms
>  Currently supported confidential guest mechanisms are:
>  
>  * AMD Secure Encrypted Virtualization (SEV) (see :doc:`i386/amd-
> memory-encryption`)
> +* Intel Trust Domain Extension (TDX) (see :doc:`i386/tdx`)
>  * POWER Protected Execution Facility (PEF) (see :ref:`power-papr-
> protected-execution-facility-pef`)
>  * s390x Protected Virtualization (PV) (see :doc:`s390x/protvirt`)
>  
> diff --git a/docs/system/i386/tdx.rst b/docs/system/i386/tdx.rst
> new file mode 100644
> index 000000000000..60106b29bf72
> --- /dev/null
> +++ b/docs/system/i386/tdx.rst
> @@ -0,0 +1,155 @@
> +Intel Trusted Domain eXtension (TDX)
> +====================================
> +
> +Intel Trusted Domain eXtensions (TDX) refers to an Intel technology
> that extends
> +Virtual Machine Extensions (VMX) and Multi-Key Total Memory
> Encryption (MKTME)
> +with a new kind of virtual machine guest called a Trust Domain (TD).
> A TD runs
> +in a CPU mode that is designed to protect the confidentiality of its
> memory
> +contents and its CPU state from any other software, including the
> hosting
> +Virtual Machine Monitor (VMM), unless explicitly shared by the TD
> itself.
> +
> +Prerequisites
> +-------------
> +
> +To run TD, the physical machine needs to have TDX module loaded and
> initialized
> +while KVM hypervisor has TDX support and has TDX enabled. If those
> requirements
> +are met, the ``KVM_CAP_VM_TYPES`` will report the support of
> ``KVM_X86_TDX_VM``.
> +
> +Trust Domain Virtual Firmware (TDVF)
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +Trust Domain Virtual Firmware (TDVF) is required to provide TD
> services to boot
> +TD Guest OS. TDVF needs to be copied to guest private memory and
> measured before
> +the TD boots.
> +
> +KVM vcpu ioctl ``KVM_TDX_INIT_MEM_REGION`` can be used to populates

s/populates/populate

> the TDVF
> +content into its private memory.
> +
> +Since TDX doesn't support readonly memslot, TDVF cannot be mapped as
> pflash
> +device and it actually works as RAM. "-bios" option is chosen to
> load TDVF.
> +
> +OVMF is the opensource firmware that implements the TDVF support.
> Thus the
> +command line to specify and load TDVF is ``-bios OVMF.fd``
> +
> +Feature Configuration
> +---------------------
> +
> +Unlike non-TDX VM, the CPU features (enumerated by CPU or MSR) of a
> TD is not

s/is/are

> +under full control of VMM. VMM can only configure part of features
> of a TD on
> +``KVM_TDX_INIT_VM`` command of VM scope ``MEMORY_ENCRYPT_OP`` ioctl.
> +
> +The configurable features have three types:
> +
> +- Attributes:
> +  - PKS (bit 30) controls whether Supervisor Protection Keys is
> exposed to TD,
> +  which determines related CPUID bit and CR4 bit;
> +  - PERFMON (bit 63) controls whether PMU is exposed to TD.
> +
> +- XSAVE related features (XFAM):
> +  XFAM is a 64b mask, which has the same format as XCR0 or IA32_XSS
> MSR. It
> +  determines the set of extended features available for use by the
> guest TD.
> +
> +- CPUID features:
> +  Only some bits of some CPUID leaves are directly configurable by
> VMM.
> +
> +What features can be configured is reported via TDX capabilities.
> +
> +TDX capabilities
> +~~~~~~~~~~~~~~~~
> +
> +The VM scope ``MEMORY_ENCRYPT_OP`` ioctl provides command
> ``KVM_TDX_CAPABILITIES``
> +to get the TDX capabilities from KVM. It returns a data structure of
> +``struct kvm_tdx_capabilities``, which tells the supported
> configuration of
> +attributes, XFAM and CPUIDs.
> +
> +TD attributes
> +~~~~~~~~~~~~~
> +
> +QEMU supports configuring raw 64-bit TD attributes directly via
> "attributes"
> +property of "tdx-guest" object. Note, it's users' responsibility to
> provide a
> +valid value because some bits may not supported by current QEMU or
> KVM yet.
> +
> +QEMU also supports the configuration of individual attribute bits
> that are
> +supported by it, via propertyies of "tdx-guest" object.

s/propertyies/properties

> +E.g., "sept-ve-disable" (bit 63).
> +
> +MSR based features
> +~~~~~~~~~~~~~~~~
> +
> +Current KVM doesn't support MSR based feature (e.g.,
> MSR_IA32_ARCH_CAPABILITIES)
> +configuration for TDX, and it's a future work to enable it in QEMU
> when KVM adds
> +support of it.
> +
> +Feature check
> +~~~~~~~~~~~~~
> +
> +QEMU checks if the final (CPU) features, determined by given cpu
> model and
> +explicit feature adjustment of "+featureA/-featureB", can be
> supported or not.
> +It can produce feature not supported warnning like
> +
> +  "warning: host doesn't support requested feature:
> CPUID.07H:EBX.intel-pt [bit 25]"
> +
> +It will also procude warning like

s/procude/produce

> +
> +  "warning: TDX forcibly sets the feature:
> CPUID.80000007H:EDX.invtsc [bit 8]"
> +
> +if the fixed-1 feature is requested to be disabled explicitly. This
> is newly
> +added to QEMU for TDX because TDX has fixed-1 features that are
> enfored enabled

s/enfored/enforced

> +by TDX module and VMM cannot disable them.
> +
> +Launching a TD (TDX VM)
> +-----------------------
> +
> +To launch a TDX guest, below are new added and required:

This sentence is missing a subject (such as "command line options").

> +
> +.. parsed-literal::
> +
> +    |qemu_system_x86| \\
> +        -object tdx-guest,id=tdx0 \\
> +        -machine ...,kernel-irqchip=split,confidential-guest-
> support=tdx0 \\
> +        -bios OVMF.fd \\
> +
> +restrictions
> +------------
> +
> + - kernel-irqchip must be split;
> +
> + - No readonly support for private memory;
> +
> + - No SMM support: SMM support requires manipulating the guset

s/guset/guest

> register states
> +   which is not allowed;
> +
> +Debugging
> +---------
> +
> +Bit 0 of TD attributes, is DEBUG bit, which decides if the TD runs
> in off-TD
> +debug mode. When in off-TD debug mode, TD's VCPU state and private
> memory are
> +accessible via given SEAMCALLs. This requires KVM to expose APIs to
> invoke those
> +SEAMCALLs and resonponding QEMU change.

s/resonponding/corresponding



      parent reply	other threads:[~2024-11-12 10:18 UTC|newest]

Thread overview: 125+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-05  6:23 [PATCH v6 00/60] QEMU TDX support Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 01/60] *** HACK *** linux-headers: Update headers to pull in TDX API changes Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 02/60] i386: Introduce tdx-guest object Xiaoyao Li
2024-11-05 10:18   ` Daniel P. Berrangé
2024-11-05 11:42     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 03/60] i386/tdx: Implement tdx_kvm_type() for TDX Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 04/60] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 05/60] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES Xiaoyao Li
2024-11-05 10:30   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 06/60] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 07/60] kvm: Introduce kvm_arch_pre_create_vcpu() Xiaoyao Li
2024-11-13  6:28   ` Philippe Mathieu-Daudé
2024-11-25  7:27     ` Xiaoyao Li
2024-11-26  9:46       ` Philippe Mathieu-Daudé
2024-11-05  6:23 ` [PATCH v6 08/60] i386/kvm: Export cpuid_entry_get_reg() and cpuid_find_entry() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 09/60] i386/tdx: Initialize TDX before creating TD vcpus Xiaoyao Li
2024-11-05 10:34   ` Daniel P. Berrangé
2024-11-05 11:51     ` Xiaoyao Li
2024-11-05 11:53       ` Daniel P. Berrangé
2024-11-05 20:51   ` Edgecombe, Rick P
2024-11-06  2:01     ` Xiaoyao Li
2024-11-06  5:13       ` Tony Lindgren
2024-12-12 17:24         ` Ira Weiny
2024-12-17 13:10           ` Tony Lindgren
2025-01-14 12:39             ` Xiaoyao Li
2025-01-15 12:12               ` Tony Lindgren
2024-11-05  6:23 ` [PATCH v6 10/60] i386/tdx: Add property sept-ve-disable for tdx-guest object Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 11/60] i386/tdx: Make sept_ve_disable set by default Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 12/60] i386/tdx: Wire CPU features up with attributes of TD guest Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 13/60] i386/tdx: Validate TD attributes Xiaoyao Li
2024-11-05 10:36   ` Daniel P. Berrangé
2024-11-05 11:53     ` Xiaoyao Li
2024-11-05 11:54       ` Daniel P. Berrangé
2024-11-05 20:56   ` Edgecombe, Rick P
2024-11-06  1:38     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 14/60] i386/tdx: Support user configurable mrconfigid/mrowner/mrownerconfig Xiaoyao Li
2024-11-05 10:38   ` Daniel P. Berrangé
2024-11-05 11:54     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 15/60] i386/tdx: Set APIC bus rate to match with what TDX module enforces Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 16/60] i386/tdx: Implement user specified tsc frequency Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 17/60] i386/tdx: load TDVF for TD guest Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 18/60] i386/tdvf: Introduce function to parse TDVF metadata Xiaoyao Li
2024-11-05 10:42   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 19/60] i386/tdx: Parse TDVF metadata for TDX VM Xiaoyao Li
2024-12-12 17:55   ` Ira Weiny
2024-11-05  6:23 ` [PATCH v6 20/60] i386/tdx: Don't initialize pc.rom for TDX VMs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 21/60] i386/tdx: Track mem_ptr for each firmware entry of TDVF Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 22/60] i386/tdx: Track RAM entries for TDX VM Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 23/60] headers: Add definitions from UEFI spec for volumes, resources, etc Xiaoyao Li
2024-11-05 10:45   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 24/60] i386/tdx: Setup the TD HOB list Xiaoyao Li
2024-11-05 10:46   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 25/60] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 26/60] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 27/60] i386/tdx: Finalize TDX VM Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 28/60] i386/tdx: Enable user exit on KVM_HC_MAP_GPA_RANGE Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 29/60] i386/tdx: Handle KVM_SYSTEM_EVENT_TDX_FATAL Xiaoyao Li
2024-11-05 20:55   ` Edgecombe, Rick P
2024-11-06 14:28     ` Edgecombe, Rick P
2024-11-05  6:23 ` [PATCH v6 30/60] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility Xiaoyao Li
2024-11-05 10:53   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 31/60] i386/cpu: introduce x86_confidential_guest_cpu_instance_init() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 32/60] i386/tdx: implement tdx_cpu_instance_init() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 33/60] i386/cpu: introduce x86_confidenetial_guest_cpu_realizefn() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 34/60] i386/tdx: implement tdx_cpu_realizefn() Xiaoyao Li
2024-11-05 10:06   ` Paolo Bonzini
2024-11-05 11:38     ` Xiaoyao Li
2024-11-05 11:53       ` Paolo Bonzini
2024-12-12 22:04         ` Ira Weiny
2025-01-14  8:52           ` Xiaoyao Li
2025-01-14 13:10             ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 35/60] i386/cpu: Introduce enable_cpuid_0x1f to force exposing CPUID 0x1f Xiaoyao Li
2024-12-12 22:16   ` Ira Weiny
2025-01-14 12:51     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 36/60] i386/tdx: Force " Xiaoyao Li
2024-12-12 22:17   ` Ira Weiny
2025-01-14 12:55     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 37/60] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 38/60] i386/tdx: Disable SMM for TDX VMs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 39/60] i386/tdx: Disable PIC " Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 40/60] hw/i386: add eoi_intercept_unsupported member to X86MachineState Xiaoyao Li
2025-01-23 12:41   ` Igor Mammedov
2025-01-23 16:45     ` Xiaoyao Li
2025-01-24 13:00       ` Igor Mammedov
2024-11-05  6:23 ` [PATCH v6 41/60] hw/i386: add option to forcibly report edge trigger in acpi tables Xiaoyao Li
2024-12-12 22:39   ` Ira Weiny
2025-01-14 13:01     ` Xiaoyao Li
2025-01-23 12:53       ` Igor Mammedov
2025-01-24 13:53         ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 42/60] i386/tdx: Don't synchronize guest tsc for TDs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 43/60] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() " Xiaoyao Li
2024-12-13 14:42   ` Ira Weiny
2024-12-17  9:41     ` Paolo Bonzini
2024-11-05  6:23 ` [PATCH v6 44/60] i386/tdx: Skip kvm_put_apicbase() " Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 45/60] i386/tdx: Don't get/put guest state for TDX VMs Xiaoyao Li
2024-11-05  9:55   ` Paolo Bonzini
2024-11-05 11:25     ` Xiaoyao Li
2024-11-05 14:23       ` Paolo Bonzini
2024-11-06 13:57         ` Xiaoyao Li
2024-11-06 19:56           ` Paolo Bonzini
2024-11-05  6:23 ` [PATCH v6 46/60] i386/cgs: Rename *mask_cpuid_features() to *adjust_cpuid_features() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 47/60] i386/tdx: Implement adjust_cpuid_features() for TDX Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 48/60] i386/tdx: Apply TDX fixed0 and fixed1 information to supported CPUIDs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 49/60] i386/tdx: Mask off CPUID bits by unsupported TD Attributes Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 50/60] i386/cpu: Move CPUID_XSTATE_XSS_MASK to header file and introduce CPUID_XSTATE_MASK Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 51/60] i386/tdx: Mask off CPUID bits by unsupported XFAM Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 52/60] i386/cpu: Expose mark_unavailable_features() for TDX Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 53/60] i386/cpu: introduce mark_forced_on_features() Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 54/60] i386/cgs: Introduce x86_confidential_guest_check_features() Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 55/60] i386/tdx: Fetch and validate CPUID of TD guest Xiaoyao Li
2024-12-12 17:52   ` Ira Weiny
2025-01-14 13:03     ` Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 56/60] i386/tdx: Don't treat SYSCALL as unavailable Xiaoyao Li
2024-11-05  9:59   ` Paolo Bonzini
2025-01-16  8:53     ` Xiaoyao Li
2024-11-05 11:07   ` Daniel P. Berrangé
2024-11-05  6:24 ` [PATCH v6 57/60] i386/tdx: Make invtsc default on Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 58/60] cpu: Introduce qemu_early_init_vcpu() Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 59/60] i386/cpu: Set up CPUID_HT in x86_cpu_realizefn() instead of cpu_x86_cpuid() Xiaoyao Li
2024-11-05  9:12   ` Paolo Bonzini
2024-11-05  9:33     ` Xiaoyao Li
2024-11-05  9:53       ` Paolo Bonzini
2024-11-05  6:24 ` [PATCH v6 60/60] docs: Add TDX documentation Xiaoyao Li
2024-11-05 11:14   ` Daniel P. Berrangé
2024-11-12 10:17   ` Francesco Lavra [this message]

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