Re: [PATCH v2 08/14] tcg/riscv: Implement vector cmp ops

[Richard Henderson <richard.henderson@linaro.org>]

On 9/2/24 23:45, Richard Henderson wrote:
> I think the first implementation should be simpler:
> 
> CONST('C', TCG_CT_CONST_CMP_VI)
> 
> tcg_target_const_match()
> {
>      ...
>      if ((ct & TCG_CT_CONST_CMP_VI) &&
>          val >= tcg_cmpcond_to_rvv_vi[cond].min &&
>          val <= tcg_cmpcond_to_rvv_vi[cond].max) {
>          return true;
>      }
> }
> 
>      case INDEX_op_cmp_vec:
>          riscv_set_vec_config_vl_vece(s, type, vece);
>          cond = args[3];
>          if (c2) {
>              tcg_out_opc_vi(s, tcg_cmpcond_to_rvv_vi[cond].op, a0, a1,
>                             a2 - tcg_cmpcond_to_rvv_vi[cond].adjust);
>          } else if (tcg_cmpcond_to_rvv_vv[cond].swap) {
>              tcg_out_opc_vv(s, tcg_cmpcond_to_rvv_vv[cond].op, a0, a2, a1);
>          } else {
>              tcg_out_opc_vv(s, tcg_cmpcond_to_rvv_vv[cond].op, a0, a1, a2);
>          }
>          break;
> 
> This appears to not require any expansion in tcg_expand_vec_op at all.

I knew I should have slept on that answer.
Of course you need expansion, because riscv cmp_vv produces a mask.

However, I think we should simply model this as INDEX_op_cmpsel_vec:

     case INDEX_op_cmpsel_vec:
           riscv_set_vec_config_vl_vece(s, type, vece);
           a3 = args[3];
           a4 = args[4];
           cond = args[5];
           /* Use only vmerge_vim if possible, by inverting the test. */
           if (const_args[4] && !const_args[3]) {
               cond = tcg_cond_inv(cond);
               a3 = a4;
               a4 = args[3];
               const_args[3] = true;
               const_args[4] = false;
           }
           /* Perform the comparison into V0 mask. */
           if (const_args[2]) {
               tcg_out_opc_vi(s, tcg_cmpcond_to_rvv_vi[cond].op,
                              TCG_REG_V0, a1,
                              a2 - tcg_cmpcond_to_rvv_vi[cond].adjust);
           } else if (tcg_cmpcond_to_rvv_vv[cond].swap) {
               tcg_out_opc_vv(s, tcg_cmpcond_to_rvv_vv[cond].op,
                              TCG_REG_V0, a2, a1);
           } else {
               tcg_out_opc_vv(s, tcg_cmpcond_to_rvv_vv[cond].op,
                              TCG_REG_V0, a1, a2);
           }
           if (const_args[3]) {
               if (const_args[4]) {
                   tcg_out_opc_vi(s, OPC_VMV_V_I, a0, TCG_REG_V0, a4, true);
                   a4 = a0;
               }
               tcg_out_opc_vim_mask(s, OPC_VMERGE_VIM, a0, a3, a4);
           } else {
               tcg_out_opc_vvm_mask(s, OPC_VMERGE_VVM, a0, a3, a4);
           }
           break;

Then INDEX_op_cmp_vec should be expanded to

     INDEX_op_cmpsel_vec a0, a1, a2, -1, 0, a3


r~