Re: [PATCH 00/61] target/arm: Implement FEAT_SME2

[Richard Henderson <richard.henderson@linaro.org>]

On 2/24/25 12:27, Richard Henderson wrote:
> On 2/6/25 11:56, Richard Henderson wrote:
>> Based-on:20250201164012.1660228-1-peter.maydell@linaro.org
>> ("[PATCH v2 00/69] target/arm: FEAT_AFP and FEAT_RPRES")
>>
>> This implements the Scalar Matrix Extensions, version 2, plus two
>> trivial extensions for float16 and bfloat16.
>>
>> This hasn't been tested much at all; I need to either get FVP up and
>> running for RISU comparison, or write some stand-alone test cases.
>> But in the meantime this could use some eyes.
>>
>> SME2 is the first vector-like extension we've had that has dynamic
>> indexing of registers: ZArray[(rv + offset) % svl], where RV is a
>> general register.  So the first thing I do is extend TCG's gvec
>> support to handle TCGv_ptr base + offset addressing.  I only changed
>> enough to handle what I needed within SME2; changing it all would be
>> a big job, and it would (at least for the moment) remain unused.
>>
>> Still to-do are few more extensions for SME2p1.
> 
> Ho hum.  I've missed the entire set of counted predicate insns.
> Hooray for Arm sample code!

Oh, duh -- they're in SME2p1, which is I guess not as optional as I assumed.


r~