From: Jiangyifei <jiangyifei@huawei.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: "kvm-riscv@lists.infradead.org" <kvm-riscv@lists.infradead.org>,
Anup Patel <anup.patel@wdc.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"open list:Overall" <kvm@vger.kernel.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
"libvir-list@redhat.com" <libvir-list@redhat.com>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
"Zhangxiaofeng \(F\)" <victor.zhangxiaofeng@huawei.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Zhanghailiang <zhang.zhanghailiang@huawei.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
yinyipeng <yinyipeng1@huawei.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Wubin \(H\)" <wu.wubin@huawei.com>,
"dengkai \(A\)" <dengkai1@huawei.com>
Subject: RE: [PATCH RFC v4 13/15] target/riscv: Introduce dynamic time frequency for virt machine
Date: Tue, 15 Dec 2020 07:31:14 +0000 [thread overview]
Message-ID: <1889871dcdf74ac3b495d75e6fd2aeaf@huawei.com> (raw)
In-Reply-To: <CAKmqyKM5m3_w6=Jd+EdTatY9G0YBm1mFjh+5FodnVmFfKydyZw@mail.gmail.com>
> -----Original Message-----
> From: Alistair Francis [mailto:alistair23@gmail.com]
> Sent: Wednesday, December 9, 2020 6:26 AM
> To: Jiangyifei <jiangyifei@huawei.com>
> Cc: qemu-devel@nongnu.org Developers <qemu-devel@nongnu.org>; open
> list:RISC-V <qemu-riscv@nongnu.org>; Zhangxiaofeng (F)
> <victor.zhangxiaofeng@huawei.com>; Sagar Karandikar
> <sagark@eecs.berkeley.edu>; open list:Overall <kvm@vger.kernel.org>;
> libvir-list@redhat.com; Bastian Koppelmann
> <kbastian@mail.uni-paderborn.de>; Anup Patel <anup.patel@wdc.com>;
> yinyipeng <yinyipeng1@huawei.com>; Alistair Francis
> <Alistair.Francis@wdc.com>; kvm-riscv@lists.infradead.org; Palmer Dabbelt
> <palmer@dabbelt.com>; dengkai (A) <dengkai1@huawei.com>; Wubin (H)
> <wu.wubin@huawei.com>; Zhanghailiang <zhang.zhanghailiang@huawei.com>
> Subject: Re: [PATCH RFC v4 13/15] target/riscv: Introduce dynamic time
> frequency for virt machine
>
> On Thu, Dec 3, 2020 at 4:57 AM Yifei Jiang <jiangyifei@huawei.com> wrote:
> >
> > Currently, time base frequency was fixed as SIFIVE_CLINT_TIMEBASE_FREQ.
> > Here introduce "time-frequency" property to set time base frequency
> > dynamically of which default value is still
> > SIFIVE_CLINT_TIMEBASE_FREQ. The virt machine uses frequency of the first
> cpu to create clint and fdt.
> >
> > Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
> > Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
> > ---
> > hw/riscv/virt.c | 18 ++++++++++++++----
> > target/riscv/cpu.c | 3 +++
> > target/riscv/cpu.h | 2 ++
> > 3 files changed, 19 insertions(+), 4 deletions(-)
> >
> > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index
> > 47b7018193..788a7237b6 100644
> > --- a/hw/riscv/virt.c
> > +++ b/hw/riscv/virt.c
> > @@ -178,7 +178,7 @@ static void create_pcie_irq_map(void *fdt, char
> > *nodename, }
> >
> > static void create_fdt(RISCVVirtState *s, const struct MemmapEntry
> *memmap,
> > - uint64_t mem_size, const char *cmdline)
> > + uint64_t mem_size, const char *cmdline, uint64_t
> > + timebase_frequency)
> > {
> > void *fdt;
> > int i, cpu, socket;
> > @@ -225,7 +225,7 @@ static void create_fdt(RISCVVirtState *s, const
> > struct MemmapEntry *memmap,
> >
> > qemu_fdt_add_subnode(fdt, "/cpus");
> > qemu_fdt_setprop_cell(fdt, "/cpus", "timebase-frequency",
> > - SIFIVE_CLINT_TIMEBASE_FREQ);
> > + timebase_frequency);
> > qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
> > qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
> > qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); @@ -510,6 +510,7
> @@
> > static void virt_machine_init(MachineState *machine)
> > target_ulong firmware_end_addr, kernel_start_addr;
> > uint32_t fdt_load_addr;
> > uint64_t kernel_entry;
> > + uint64_t timebase_frequency = 0;
> > DeviceState *mmio_plic, *virtio_plic, *pcie_plic;
> > int i, j, base_hartid, hart_count;
> > CPUState *cs;
> > @@ -553,12 +554,20 @@ static void virt_machine_init(MachineState
> *machine)
> > hart_count, &error_abort);
> > sysbus_realize(SYS_BUS_DEVICE(&s->soc[i]), &error_abort);
> >
> > + if (!timebase_frequency) {
> > + timebase_frequency = RISCV_CPU(first_cpu)->env.frequency;
> > + }
> > + /* If vcpu's time frequency is not specified, we use default
> frequency */
> > + if (!timebase_frequency) {
> > + timebase_frequency = SIFIVE_CLINT_TIMEBASE_FREQ;
> > + }
> > +
> > /* Per-socket CLINT */
> > sifive_clint_create(
> > memmap[VIRT_CLINT].base + i *
> memmap[VIRT_CLINT].size,
> > memmap[VIRT_CLINT].size, base_hartid, hart_count,
> > SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE,
> SIFIVE_TIME_BASE,
> > - SIFIVE_CLINT_TIMEBASE_FREQ, true);
> > + timebase_frequency, true);
> >
> > /* Per-socket PLIC hart topology configuration string */
> > plic_hart_config_len =
> > @@ -610,7 +619,8 @@ static void virt_machine_init(MachineState
> *machine)
> > main_mem);
> >
> > /* create device tree */
> > - create_fdt(s, memmap, machine->ram_size,
> machine->kernel_cmdline);
> > + create_fdt(s, memmap, machine->ram_size,
> machine->kernel_cmdline,
> > + timebase_frequency);
> >
> > /* boot rom */
> > memory_region_init_rom(mask_rom, NULL, "riscv_virt_board.mrom",
> > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index
> > 439dc89ee7..66f35bcbbf 100644
> > --- a/target/riscv/cpu.c
> > +++ b/target/riscv/cpu.c
> > @@ -494,6 +494,8 @@ static void riscv_cpu_realize(DeviceState *dev,
> > Error **errp)
> >
> > riscv_cpu_register_gdb_regs_for_features(cs);
> >
> > + env->user_frequency = env->frequency;
> > +
> > qemu_init_vcpu(cs);
> > cpu_reset(cs);
> >
> > @@ -531,6 +533,7 @@ static Property riscv_cpu_properties[] = {
> > DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
> > DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),
> > DEFINE_PROP_UINT64("resetvec", RISCVCPU, cfg.resetvec,
> > DEFAULT_RSTVEC),
> > + DEFINE_PROP_UINT64("time-frequency", RISCVCPU, env.frequency, 0),
>
> Why not set the default to SIFIVE_CLINT_TIMEBASE_FREQ?
>
When the time frequency is not specified, it will follow the host or the migration
source. And we define 0 as equivalent to not specified time frequency.
> Also, QEMU now has a clock API, is using that instead a better option?
>
Sorry, I didn't find the clock API. Could you tell me what the API is.
I think that the time frequency is option of KVM VCPU. So it is appropriate to put this
option in the CPU.
Yifei
> Alistair
>
> > DEFINE_PROP_END_OF_LIST(),
> > };
> >
> > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index
> > 16d6050ead..f5b6c34176 100644
> > --- a/target/riscv/cpu.h
> > +++ b/target/riscv/cpu.h
> > @@ -243,6 +243,8 @@ struct CPURISCVState {
> > uint64_t kvm_timer_time;
> > uint64_t kvm_timer_compare;
> > uint64_t kvm_timer_state;
> > + uint64_t user_frequency;
> > + uint64_t frequency;
> > };
> >
> > OBJECT_DECLARE_TYPE(RISCVCPU, RISCVCPUClass,
> > --
> > 2.19.1
> >
> >
next prev parent reply other threads:[~2020-12-15 7:33 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-03 12:46 [PATCH RFC v4 00/15] Add riscv kvm accel support Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 01/15] linux-header: Update linux/kvm.h Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 02/15] target/riscv: Add target/riscv/kvm.c to place the public kvm interface Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 03/15] target/riscv: Implement function kvm_arch_init_vcpu Yifei Jiang
2020-12-08 22:13 ` Alistair Francis
2020-12-03 12:46 ` [PATCH RFC v4 04/15] target/riscv: Implement kvm_arch_get_registers Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 05/15] target/riscv: Implement kvm_arch_put_registers Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 06/15] target/riscv: Support start kernel directly by KVM Yifei Jiang
2020-12-08 22:19 ` Alistair Francis
2020-12-15 7:19 ` Jiangyifei
2020-12-03 12:46 ` [PATCH RFC v4 07/15] hw/riscv: PLIC update external interrupt by KVM when kvm enabled Yifei Jiang
2020-12-08 22:29 ` Alistair Francis
2020-12-15 7:33 ` Jiangyifei
2020-12-03 12:46 ` [PATCH RFC v4 08/15] target/riscv: Handle KVM_EXIT_RISCV_SBI exit Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 09/15] target/riscv: Add host cpu type Yifei Jiang
2020-12-08 22:21 ` Alistair Francis
2020-12-15 7:21 ` Jiangyifei
2020-12-03 12:46 ` [PATCH RFC v4 10/15] target/riscv: Add kvm_riscv_get/put_regs_timer Yifei Jiang
2020-12-03 12:46 ` [PATCH RFC v4 11/15] target/riscv: Implement virtual time adjusting with vm state changing Yifei Jiang
2020-12-03 12:47 ` [PATCH RFC v4 12/15] target/riscv: Support virtual time context synchronization Yifei Jiang
2020-12-03 12:47 ` [PATCH RFC v4 13/15] target/riscv: Introduce dynamic time frequency for virt machine Yifei Jiang
2020-12-08 22:25 ` Alistair Francis
2020-12-15 7:31 ` Jiangyifei [this message]
2021-01-05 17:36 ` Alistair Francis
2020-12-03 12:47 ` [PATCH RFC v4 14/15] target/riscv: Synchronize vcpu's frequency with KVM Yifei Jiang
2020-12-03 12:47 ` [PATCH RFC v4 15/15] target/riscv: Add time frequency migration support Yifei Jiang
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