From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54909) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bn5oR-0004kD-9P for qemu-devel@nongnu.org; Thu, 22 Sep 2016 11:21:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bn5oO-00008r-0C for qemu-devel@nongnu.org; Thu, 22 Sep 2016 11:21:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46532) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bn5oN-00008P-Ml for qemu-devel@nongnu.org; Thu, 22 Sep 2016 11:21:19 -0400 References: <147455590865.8519.11191009507297313736.stgit@brijesh-build-machine> <147455594057.8519.18153674804012845873.stgit@brijesh-build-machine> From: Paolo Bonzini Message-ID: <1916ad5a-c4a3-283f-3421-607133961fe5@redhat.com> Date: Thu, 22 Sep 2016 17:21:13 +0200 MIME-Version: 1.0 In-Reply-To: <147455594057.8519.18153674804012845873.stgit@brijesh-build-machine> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC PATCH v2 03/16] exec: add debug version of physical memory read and write apis List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Brijesh Singh , ehabkost@redhat.com, crosthwaite.peter@gmail.com, armbru@redhat.com, mst@redhat.com, p.fedin@samsung.com, qemu-devel@nongnu.org, lcapitulino@redhat.com, rth@twiddle.net On 22/09/2016 16:52, Brijesh Singh wrote: > The patch adds the following new APIs: > - cpu_physical_memory_read_debug > - cpu_physical_memory_write_debug > - cpu_physical_memory_rw_debug > - ldl_phys_debug > - ldq_phys_debug >=20 > The idea behind this patch is that if all the qemu monitor memory dumps > and gdbserver accesses are done through these common APIs then in futur= e > we can define some kind of global debug policy to control debug behavio= r. >=20 > Signed-off-by: Brijesh Singh Reviewed-by: Paolo Bonzini > --- > exec.c | 32 ++++++++++++++++++++++++++++++++ > include/exec/cpu-common.h | 15 +++++++++++++++ > 2 files changed, 47 insertions(+) >=20 > diff --git a/exec.c b/exec.c > index 0989933..9d0128e 100644 > --- a/exec.c > +++ b/exec.c > @@ -3105,6 +3105,30 @@ uint32_t ldl_phys(AddressSpace *as, hwaddr addr) > return address_space_ldl(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); > } > =20 > +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr) > +{ > + MemTxAttrs attrs =3D MEMTXATTRS_DEBUG; > + int asidx =3D cpu_asidx_from_attrs(cpu, attrs); > + uint32_t val; > + > + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, > + addr, (void *) &val, > + 4, attrs, READ_DATA); > + return tswap32(val); > +} > + > +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr) > +{ > + MemTxAttrs attrs =3D MEMTXATTRS_DEBUG; > + int asidx =3D cpu_asidx_from_attrs(cpu, attrs); > + uint64_t val; > + > + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, > + addr, (void *) &val, > + 8, attrs, READ_DATA); > + return val; > +} > + > uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr) > { > return address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL= ); > @@ -3615,6 +3639,14 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, = uint64_t val) > address_space_stq_be(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); > } > =20 > +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, > + int len, int is_write) > +{ > + cpu_physical_memory_rw_debug_internal(&address_space_memory, addr, > + buf, len, MEMTXATTRS_DEBUG, > + is_write ? WRITE_DATA : READ= _DATA); > +} > + > /* virtual memory access for debug (includes writing to ROM) */ > int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, > uint8_t *buf, int len, int is_write) > diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h > index 520dae0..90598d4 100644 > --- a/include/exec/cpu-common.h > +++ b/include/exec/cpu-common.h > @@ -61,6 +61,8 @@ const char *qemu_ram_get_idstr(RAMBlock *rb); > =20 > void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, > int len, int is_write); > +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, > + int len, int is_write); > static inline void cpu_physical_memory_read(hwaddr addr, > void *buf, int len) > { > @@ -71,6 +73,19 @@ static inline void cpu_physical_memory_write(hwaddr = addr, > { > cpu_physical_memory_rw(addr, (void *)buf, len, 1); > } > +static inline void cpu_physical_memory_read_debug(hwaddr addr, > + void *buf, int len) > +{ > + cpu_physical_memory_rw_debug(addr, buf, len, 0); > +} > +static inline void cpu_physical_memory_write_debug(hwaddr addr, > + const void *buf, in= t len) > +{ > + cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1); > +} > +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr); > +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr); > + > void *cpu_physical_memory_map(hwaddr addr, > hwaddr *plen, > int is_write); >=20