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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-459e5d0b1afsm4945935e9.26.2025.08.05.08.29.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 Aug 2025 08:29:38 -0700 (PDT) Message-ID: <192fddd3-3ca8-4e7c-a258-143b77c963e8@linaro.org> Date: Tue, 5 Aug 2025 17:29:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for v10.1] i386/cpu: Move addressable ID encoding out of compat property in CPUID[0x1] To: Zhao Liu , Paolo Bonzini , Michael Tokarev Cc: qemu-devel@nongnu.org, qemu-stable@nongnu.org, Chuang Xu References: <20250804053548.1808629-1-zhao1.liu@intel.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250804053548.1808629-1-zhao1.liu@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 4/8/25 07:35, Zhao Liu wrote: > Currently, the addressable ID encoding for CPUID[0x1].EBX[bits 16-23] > (Maximum number of addressable IDs for logical processors in this > physical package) is covered by vendor_cpuid_only_v2 compat property. > The previous consideration was to avoid breaking migration and this > compat property makes it unfriendly to backport the commit f985a1195ba2 > ("i386/cpu: Fix number of addressable IDs field for CPUID.01H.EBX > [23:16]"). > > However, NetBSD booting is broken since the commit 88dd4ca06c83 > ("i386/cpu: Use APIC ID info to encode cache topo in CPUID[4]"), > because NetBSD calculates smt information via `lp_max` / `core_max` for > legacy Intel CPUs which doesn't support 0xb leaf, where `lp_max` is from > CPUID[0x1].EBX.bits[16-23] and `core_max` is from CPUID[0x4].0x0.bits[26 > -31]. > > The commit 88dd4ca0 changed the encoding rule of `core_max` but didn't > update `lp_max`, so that NetBSD would get the wrong smt information, > which leads to the module loading failure. > > Luckily, the commit f985a1195ba2 ("i386/cpu: Fix number of addressable > IDs field for CPUID.01H.EBX[23:16]") updated the encoding rule for > `lp_max` and accidentally fixed the NetBSD issue too. This also shows > that using CPUID[0x1] and CPUID[0x4].0x0 to calculate HT/SMT information > is a common practice to detect CPU topology on legacy Intel CPUs. > > Therefore, it's necessary to backport the commit f985a1195ba2 to > previous stable QEMU to help address the similar issues as well. Then > the compat property is not needed any more since all stable QEMUs will > follow the same encoding way. > > So, in CPUID[0x1], move addressable ID encoding out of compat property. > > Reported-by: Michael Tokarev > Inspired-by: Chuang Xu > Fixes: commit f985a1195ba2 ("i386/cpu: Fix number of addressable IDs field for CPUID.01H.EBX[23:16]") > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3061 > Signed-off-by: Zhao Liu > --- > target/i386/cpu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Patch queued, thanks!