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References: <20180823175225.22612-1-peter.maydell@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <1a00a128-08ca-a214-5f69-971a867cdde7@linaro.org>
Date: Thu, 23 Aug 2018 21:20:25 -0700
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Subject: Re: [Qemu-devel] [PATCH] hw/arm/mps2: Fix ID register errors on
 AN511 and AN385
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org

On 08/23/2018 10:52 AM, Peter Maydell wrote:
> Fix MPS2 SCC config register values for the mps2-an511
> and mps2-an385 boards:
>  * the SCC_AID bits [23:20] specify the FPGA build target board revision,
>    and the SCC_CFG4 register specifies the actual board revision, so
>    these should have matching values. Claim to be board revision C,
>    consistently -- we had the revision in the wrong part of SCC_AID.
>  * SCC_ID bits [15:4] should be the board number in hex, not decimal
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> This fixes a bug that I noticed for the AN505 model and fixed there,
> but forgot to also fix on our other MPS image models.
> 
>  hw/arm/mps2.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~