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[176.184.18.96]) by smtp.gmail.com with ESMTPSA id v11-20020a5d4b0b000000b0033d90b314e7sm2631441wrq.101.2024.02.23.04.26.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Feb 2024 04:26:11 -0800 (PST) Message-ID: <1a71aa6a-0fe0-4407-a2f3-3fb9bacaed8c@linaro.org> Date: Fri, 23 Feb 2024 13:26:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] tests/qtest: Add STM32L4x5 GPIO QTest testcase Content-Language: en-US To: =?UTF-8?Q?In=C3=A8s_Varhol?= , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Laurent Vivier , Paolo Bonzini , Peter Maydell , Alistair Francis , Samuel Tardieu , Thomas Huth , Arnaud Minier References: <20240207132517.198348-1-ines.varhol@telecom-paris.fr> <20240207132517.198348-4-ines.varhol@telecom-paris.fr> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240207132517.198348-4-ines.varhol@telecom-paris.fr> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/2/24 14:23, Inès Varhol wrote: > The testcase contains : > - `test_idr_reset_value()` : > Checks the reset values of MODER, OTYPER, PUPDR, ODR and IDR. > - `test_gpio_output_mode()` : > Checks that writing a bit in register ODR results in the corresponding > pin rising or lowering, if this pin is configured in output mode. > - `test_gpio_input_mode()` : > Checks that a input pin set high or low externally results > in the pin rising and lowering. > - `test_pull_up_pull_down()` : > Checks that a floating pin in pull-up/down mode is actually high/down. > - `test_push_pull()` : > Checks that a pin set externally is disconnected when configured in > push-pull output mode, and can't be set externally while in this mode. > - `test_open_drain()` : > Checks that a pin set externally high is disconnected when configured > in open-drain output mode, and can't be set high while in this mode. > - `test_bsrr_brr()` : > Checks that writing to BSRR and BRR has the desired result in ODR. > - `test_clock_enable()` : > Checks that GPIO clock is at the right frequency after enabling it. > > Acked-by: Thomas Huth > Signed-off-by: Arnaud Minier > Signed-off-by: Inès Varhol > --- > tests/qtest/stm32l4x5_gpio-test.c | 586 ++++++++++++++++++++++++++++++ > tests/qtest/meson.build | 3 +- > 2 files changed, 588 insertions(+), 1 deletion(-) > create mode 100644 tests/qtest/stm32l4x5_gpio-test.c LGTM!