* [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
@ 2024-05-02 6:27 Aditya Gupta
2024-05-02 8:21 ` Cédric Le Goater
0 siblings, 1 reply; 5+ messages in thread
From: Aditya Gupta @ 2024-05-02 6:27 UTC (permalink / raw)
To: Mahesh J Salgaonkar, Madhavan Srinivasan, Nicholas Piggin,
Cédric Le Goater
Cc: qemu-devel, qemu-ppc, David Gibson, Frédéric Barrat,
Laurent Vivier, Paolo Bonzini, Thomas Huth
Power10 DD1.0 was dropped in:
commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 DD1 chips")
Use the newer Power10 DD2 chips cfam id.
Cc: Cédric Le Goater <clg@kaod.org>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
Cc: Laurent Vivier <lvivier@redhat.com>
Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
hw/ppc/pnv.c | 2 +-
tests/qtest/pnv-xscom.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 6e3a5ccdec76..06a4e4d13948 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -2090,7 +2090,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
PnvChipClass *k = PNV_CHIP_CLASS(klass);
static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16};
- k->chip_cfam_id = 0x120da04900008000ull; /* P10 DD1.0 (with NX) */
+ k->chip_cfam_id = 0x220da04980000000ull; /* P10 DD2.0 (with NX) */
k->cores_mask = POWER10_CORE_MASK;
k->chip_pir = pnv_chip_pir_p10;
k->intc_create = pnv_chip_power10_intc_create;
diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h
index 6f62941744a6..5aa1701ea768 100644
--- a/tests/qtest/pnv-xscom.h
+++ b/tests/qtest/pnv-xscom.h
@@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = {
.chip_type = PNV_CHIP_POWER10,
.cpu_model = "POWER10",
.xscom_base = 0x000603fc00000000ull,
- .cfam_id = 0x120da04900008000ull,
+ .cfam_id = 0x220da04980000000ull,
.first_core = 0x0,
.num_i2c = 4,
},
--
2.44.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
2024-05-02 6:27 [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2 Aditya Gupta
@ 2024-05-02 8:21 ` Cédric Le Goater
2024-07-22 9:17 ` Aditya Gupta
0 siblings, 1 reply; 5+ messages in thread
From: Cédric Le Goater @ 2024-05-02 8:21 UTC (permalink / raw)
To: Aditya Gupta, Mahesh J Salgaonkar, Madhavan Srinivasan,
Nicholas Piggin
Cc: qemu-devel, qemu-ppc, David Gibson, Frédéric Barrat,
Laurent Vivier, Paolo Bonzini, Thomas Huth
On 5/2/24 08:27, Aditya Gupta wrote:
> Power10 DD1.0 was dropped in:
>
> commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10 DD1 chips")
>
> Use the newer Power10 DD2 chips cfam id.
>
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
> Cc: Laurent Vivier <lvivier@redhat.com>
> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
> Cc: Nicholas Piggin <npiggin@gmail.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Thomas Huth <thuth@redhat.com>
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/ppc/pnv.c | 2 +-
> tests/qtest/pnv-xscom.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 6e3a5ccdec76..06a4e4d13948 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -2090,7 +2090,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
> static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16};
>
> - k->chip_cfam_id = 0x120da04900008000ull; /* P10 DD1.0 (with NX) */
> + k->chip_cfam_id = 0x220da04980000000ull; /* P10 DD2.0 (with NX) */
> k->cores_mask = POWER10_CORE_MASK;
> k->chip_pir = pnv_chip_pir_p10;
> k->intc_create = pnv_chip_power10_intc_create;
> diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h
> index 6f62941744a6..5aa1701ea768 100644
> --- a/tests/qtest/pnv-xscom.h
> +++ b/tests/qtest/pnv-xscom.h
> @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = {
> .chip_type = PNV_CHIP_POWER10,
> .cpu_model = "POWER10",
> .xscom_base = 0x000603fc00000000ull,
> - .cfam_id = 0x120da04900008000ull,
> + .cfam_id = 0x220da04980000000ull,
> .first_core = 0x0,
> .num_i2c = 4,
> },
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
2024-05-02 8:21 ` Cédric Le Goater
@ 2024-07-22 9:17 ` Aditya Gupta
2024-07-23 4:18 ` Nicholas Piggin
0 siblings, 1 reply; 5+ messages in thread
From: Aditya Gupta @ 2024-07-22 9:17 UTC (permalink / raw)
To: Cédric Le Goater, Nicholas Piggin
Cc: qemu-devel, qemu-ppc, David Gibson, Frédéric Barrat,
Laurent Vivier, Paolo Bonzini, Mahesh J Salgaonkar,
Madhavan Srinivasan
Hello,
Any comments on this change ?
Though this isn't urgent and won't change behaviour much, mainly other
than skiboot recognising the chip as P10 DD2.
Thanks
- Aditya Gupta
On 02/05/24 13:51, Cédric Le Goater wrote:
> On 5/2/24 08:27, Aditya Gupta wrote:
>> Power10 DD1.0 was dropped in:
>>
>> commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10
>> DD1 chips")
>>
>> Use the newer Power10 DD2 chips cfam id.
>>
>> Cc: Cédric Le Goater <clg@kaod.org>
>> Cc: David Gibson <david@gibson.dropbear.id.au>
>> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
>> Cc: Laurent Vivier <lvivier@redhat.com>
>> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
>> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
>> Cc: Nicholas Piggin <npiggin@gmail.com>
>> Cc: Paolo Bonzini <pbonzini@redhat.com>
>> Cc: Thomas Huth <thuth@redhat.com>
>> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
>
>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>
>
> Thanks,
>
> C.
>
>
>> ---
>> hw/ppc/pnv.c | 2 +-
>> tests/qtest/pnv-xscom.h | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
>> index 6e3a5ccdec76..06a4e4d13948 100644
>> --- a/hw/ppc/pnv.c
>> +++ b/hw/ppc/pnv.c
>> @@ -2090,7 +2090,7 @@ static void
>> pnv_chip_power10_class_init(ObjectClass *klass, void *data)
>> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>> static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] =
>> {14, 14, 2, 16};
>> - k->chip_cfam_id = 0x120da04900008000ull; /* P10 DD1.0 (with
>> NX) */
>> + k->chip_cfam_id = 0x220da04980000000ull; /* P10 DD2.0 (with NX) */
>> k->cores_mask = POWER10_CORE_MASK;
>> k->chip_pir = pnv_chip_pir_p10;
>> k->intc_create = pnv_chip_power10_intc_create;
>> diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h
>> index 6f62941744a6..5aa1701ea768 100644
>> --- a/tests/qtest/pnv-xscom.h
>> +++ b/tests/qtest/pnv-xscom.h
>> @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = {
>> .chip_type = PNV_CHIP_POWER10,
>> .cpu_model = "POWER10",
>> .xscom_base = 0x000603fc00000000ull,
>> - .cfam_id = 0x120da04900008000ull,
>> + .cfam_id = 0x220da04980000000ull,
>> .first_core = 0x0,
>> .num_i2c = 4,
>> },
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
2024-07-22 9:17 ` Aditya Gupta
@ 2024-07-23 4:18 ` Nicholas Piggin
2024-07-23 4:36 ` Aditya Gupta
0 siblings, 1 reply; 5+ messages in thread
From: Nicholas Piggin @ 2024-07-23 4:18 UTC (permalink / raw)
To: Aditya Gupta, Cédric Le Goater
Cc: qemu-devel, qemu-ppc, David Gibson, Frédéric Barrat,
Laurent Vivier, Paolo Bonzini, Mahesh J Salgaonkar,
Madhavan Srinivasan
On Mon Jul 22, 2024 at 7:17 PM AEST, Aditya Gupta wrote:
> Hello,
>
> Any comments on this change ?
>
> Though this isn't urgent and won't change behaviour much, mainly other
> than skiboot recognising the chip as P10 DD2.
Hey Aditya,
Yeah I missed this in my last PR but I have it in my tree.
Thanks,
Nick
>
>
> Thanks
>
> - Aditya Gupta
>
>
> On 02/05/24 13:51, Cédric Le Goater wrote:
>
> > On 5/2/24 08:27, Aditya Gupta wrote:
> >> Power10 DD1.0 was dropped in:
> >>
> >> commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10
> >> DD1 chips")
> >>
> >> Use the newer Power10 DD2 chips cfam id.
> >>
> >> Cc: Cédric Le Goater <clg@kaod.org>
> >> Cc: David Gibson <david@gibson.dropbear.id.au>
> >> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
> >> Cc: Laurent Vivier <lvivier@redhat.com>
> >> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
> >> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
> >> Cc: Nicholas Piggin <npiggin@gmail.com>
> >> Cc: Paolo Bonzini <pbonzini@redhat.com>
> >> Cc: Thomas Huth <thuth@redhat.com>
> >> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> >
> >
> > Reviewed-by: Cédric Le Goater <clg@redhat.com>
> >
> > Thanks,
> >
> > C.
> >
> >
> >> ---
> >> hw/ppc/pnv.c | 2 +-
> >> tests/qtest/pnv-xscom.h | 2 +-
> >> 2 files changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> >> index 6e3a5ccdec76..06a4e4d13948 100644
> >> --- a/hw/ppc/pnv.c
> >> +++ b/hw/ppc/pnv.c
> >> @@ -2090,7 +2090,7 @@ static void
> >> pnv_chip_power10_class_init(ObjectClass *klass, void *data)
> >> PnvChipClass *k = PNV_CHIP_CLASS(klass);
> >> static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] =
> >> {14, 14, 2, 16};
> >> - k->chip_cfam_id = 0x120da04900008000ull; /* P10 DD1.0 (with
> >> NX) */
> >> + k->chip_cfam_id = 0x220da04980000000ull; /* P10 DD2.0 (with NX) */
> >> k->cores_mask = POWER10_CORE_MASK;
> >> k->chip_pir = pnv_chip_pir_p10;
> >> k->intc_create = pnv_chip_power10_intc_create;
> >> diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h
> >> index 6f62941744a6..5aa1701ea768 100644
> >> --- a/tests/qtest/pnv-xscom.h
> >> +++ b/tests/qtest/pnv-xscom.h
> >> @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = {
> >> .chip_type = PNV_CHIP_POWER10,
> >> .cpu_model = "POWER10",
> >> .xscom_base = 0x000603fc00000000ull,
> >> - .cfam_id = 0x120da04900008000ull,
> >> + .cfam_id = 0x220da04980000000ull,
> >> .first_core = 0x0,
> >> .num_i2c = 4,
> >> },
> >
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2
2024-07-23 4:18 ` Nicholas Piggin
@ 2024-07-23 4:36 ` Aditya Gupta
0 siblings, 0 replies; 5+ messages in thread
From: Aditya Gupta @ 2024-07-23 4:36 UTC (permalink / raw)
To: Nicholas Piggin, Cédric Le Goater
Cc: qemu-devel, qemu-ppc, David Gibson, Frédéric Barrat,
Laurent Vivier, Paolo Bonzini, Mahesh J Salgaonkar,
Madhavan Srinivasan
Hi Nick,
On 23/07/24 09:48, Nicholas Piggin wrote:
> On Mon Jul 22, 2024 at 7:17 PM AEST, Aditya Gupta wrote:
>> Hello,
>>
>> Any comments on this change ?
>>
>> Though this isn't urgent and won't change behaviour much, mainly other
>> than skiboot recognising the chip as P10 DD2.
> Hey Aditya,
>
> Yeah I missed this in my last PR but I have it in my tree.
Got it, thank you !
- Aditya Gupta
> Thanks,
> Nick
>
>>
>> Thanks
>>
>> - Aditya Gupta
>>
>>
>> On 02/05/24 13:51, Cédric Le Goater wrote:
>>
>>> On 5/2/24 08:27, Aditya Gupta wrote:
>>>> Power10 DD1.0 was dropped in:
>>>>
>>>> commit 8f054d9ee825 ("ppc: Drop support for POWER9 and POWER10
>>>> DD1 chips")
>>>>
>>>> Use the newer Power10 DD2 chips cfam id.
>>>>
>>>> Cc: Cédric Le Goater <clg@kaod.org>
>>>> Cc: David Gibson <david@gibson.dropbear.id.au>
>>>> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
>>>> Cc: Laurent Vivier <lvivier@redhat.com>
>>>> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
>>>> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
>>>> Cc: Nicholas Piggin <npiggin@gmail.com>
>>>> Cc: Paolo Bonzini <pbonzini@redhat.com>
>>>> Cc: Thomas Huth <thuth@redhat.com>
>>>> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
>>>
>>> Reviewed-by: Cédric Le Goater <clg@redhat.com>
>>>
>>> Thanks,
>>>
>>> C.
>>>
>>>
>>>> ---
>>>> hw/ppc/pnv.c | 2 +-
>>>> tests/qtest/pnv-xscom.h | 2 +-
>>>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
>>>> index 6e3a5ccdec76..06a4e4d13948 100644
>>>> --- a/hw/ppc/pnv.c
>>>> +++ b/hw/ppc/pnv.c
>>>> @@ -2090,7 +2090,7 @@ static void
>>>> pnv_chip_power10_class_init(ObjectClass *klass, void *data)
>>>> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>>>> static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] =
>>>> {14, 14, 2, 16};
>>>> - k->chip_cfam_id = 0x120da04900008000ull; /* P10 DD1.0 (with
>>>> NX) */
>>>> + k->chip_cfam_id = 0x220da04980000000ull; /* P10 DD2.0 (with NX) */
>>>> k->cores_mask = POWER10_CORE_MASK;
>>>> k->chip_pir = pnv_chip_pir_p10;
>>>> k->intc_create = pnv_chip_power10_intc_create;
>>>> diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h
>>>> index 6f62941744a6..5aa1701ea768 100644
>>>> --- a/tests/qtest/pnv-xscom.h
>>>> +++ b/tests/qtest/pnv-xscom.h
>>>> @@ -56,7 +56,7 @@ static const PnvChip pnv_chips[] = {
>>>> .chip_type = PNV_CHIP_POWER10,
>>>> .cpu_model = "POWER10",
>>>> .xscom_base = 0x000603fc00000000ull,
>>>> - .cfam_id = 0x120da04900008000ull,
>>>> + .cfam_id = 0x220da04980000000ull,
>>>> .first_core = 0x0,
>>>> .num_i2c = 4,
>>>> },
^ permalink raw reply [flat|nested] 5+ messages in thread
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2024-05-02 6:27 [PATCH] ppc/pnv: Update Power10's cfam id to use Power10 DD2 Aditya Gupta
2024-05-02 8:21 ` Cédric Le Goater
2024-07-22 9:17 ` Aditya Gupta
2024-07-23 4:18 ` Nicholas Piggin
2024-07-23 4:36 ` Aditya Gupta
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