From: Richard Henderson <richard.henderson@linaro.org>
To: Jiajie Chen <c@jia.je>, qemu-devel@nongnu.org
Cc: yijun@loongson.cn, shenjinyang@loongson.cn, gaosong@loongson.cn,
i.qemu@xen0n.name, Xiaojuan Yang <yangxiaojuan@loongson.cn>
Subject: Re: [PATCH v5 09/11] target/loongarch: Truncate high 32 bits of address in VA32 mode
Date: Wed, 9 Aug 2023 08:10:26 -0700 [thread overview]
Message-ID: <1b400192-d622-02d9-0a3f-1b6d8dfc7eea@linaro.org> (raw)
In-Reply-To: <20230809083258.1787464-10-c@jia.je>
On 8/9/23 01:26, Jiajie Chen wrote:
> When running in VA32 mode(!LA64 or VA32L[1-3] matching PLV), virtual
> address is truncated to 32 bits before address mapping.
>
> Signed-off-by: Jiajie Chen<c@jia.je>
> Co-authored-by: Richard Henderson<richard.henderson@linaro.org>
> ---
> target/loongarch/cpu.c | 16 ++++----
> target/loongarch/cpu.h | 9 +++++
> target/loongarch/gdbstub.c | 2 +-
> .../loongarch/insn_trans/trans_atomic.c.inc | 5 ++-
> .../loongarch/insn_trans/trans_branch.c.inc | 3 +-
> .../loongarch/insn_trans/trans_fmemory.c.inc | 30 ++++-----------
> target/loongarch/insn_trans/trans_lsx.c.inc | 38 +++++--------------
> .../loongarch/insn_trans/trans_memory.c.inc | 34 +++++------------
> target/loongarch/op_helper.c | 4 +-
> target/loongarch/translate.c | 32 ++++++++++++++++
> 10 files changed, 85 insertions(+), 88 deletions(-)
Much better, thanks.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2023-08-09 15:11 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-09 8:26 [PATCH v5 00/11] Add la32 & va32 support for loongarch64-softmmu Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 01/11] target/loongarch: Add function to check current arch Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 02/11] target/loongarch: Add new object class for loongarch32 cpus Jiajie Chen
2023-08-09 14:47 ` Richard Henderson
2023-08-09 8:26 ` [PATCH v5 03/11] target/loongarch: Add GDB support for loongarch32 mode Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 04/11] target/loongarch: Support LoongArch32 TLB entry Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 05/11] target/loongarch: Support LoongArch32 DMW Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 06/11] target/loongarch: Support LoongArch32 VPPN Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 07/11] target/loongarch: Add LA64 & VA32 to DisasContext Jiajie Chen
2023-08-09 8:26 ` [PATCH v5 08/11] target/loongarch: Reject la64-only instructions in la32 mode Jiajie Chen
2023-08-09 15:03 ` Richard Henderson
2023-08-10 2:38 ` gaosong
2023-08-10 2:58 ` Richard Henderson
2023-08-11 8:12 ` gaosong
2023-08-11 15:18 ` Richard Henderson
2023-08-14 8:59 ` gaosong
2023-08-09 8:26 ` [PATCH v5 09/11] target/loongarch: Truncate high 32 bits of address in VA32 mode Jiajie Chen
2023-08-09 15:10 ` Richard Henderson [this message]
2023-08-09 8:26 ` [PATCH v5 10/11] target/loongarch: Sign extend results " Jiajie Chen
2023-08-09 15:11 ` Richard Henderson
2023-08-09 8:26 ` [PATCH v5 11/11] target/loongarch: Add loongarch32 cpu la132 Jiajie Chen
2023-08-09 15:11 ` Richard Henderson
2023-08-10 12:47 ` gaosong
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