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(2001-44b8-2176-c800-f1c3-9f9c-2e9f-1ebd.static.ipv6.internode.on.net. [2001:44b8:2176:c800:f1c3:9f9c:2e9f:1ebd]) by smtp.gmail.com with ESMTPSA id g11sm68730787pgd.26.2020.01.05.12.19.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 05 Jan 2020 12:19:54 -0800 (PST) Subject: Re: [Qemu-devel] [PATCH] RISCV: support riscv vector extension 0.7.1 To: LIU Zhiwei References: <1566959818-38369-1-git-send-email-zhiwei_liu@c-sky.com> <1b1826c3-50e4-2481-56a2-4ebb01e04498@c-sky.com> <9e1c5407-3704-9c34-92d7-fd59e48eb13a@linaro.org> From: Richard Henderson Message-ID: <1bacf00f-d599-8e3e-e649-6e808f932b11@linaro.org> Date: Mon, 6 Jan 2020 06:19:47 +1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, Alistair.Francis@wdc.com, qemu-devel@nongnu.org, Chih-Min Chao Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/30/19 6:11 PM, LIU Zhiwei wrote: > > However It's not clear when use tcg_gen_gvec_*_ptr or tcg_gen_gvec_ool. I think > the meaning of oprsz is the > the bits of active elements.  Therefore , oprsz is  8 * env->vext.vl in RISC-V > and it can't be fetched  from > TB_FLAGS like SVE. > > Probably oprsz field will be not be used in RISC-V vector extension. Correct. For those risc-v helpers that are called when VL != VLMAX, you would ignore the oprsz field and fetch it from env. It may still be handy to pass in vlmax as maxsz, even if you leave the oprsz field 0. You'll find that out as you do the coding, I suppose. r~