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([2602:ae:1598:4c01:a083:fa5e:b91b:bcc6]) by smtp.gmail.com with ESMTPSA id br7-20020a17090b0f0700b00267bb769652sm111209pjb.6.2023.07.25.16.32.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Jul 2023 16:32:28 -0700 (PDT) Message-ID: <1bbf8dfe-6b92-6a3e-8d0d-98eed2a9844a@linaro.org> Date: Tue, 25 Jul 2023 16:32:26 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH for-8.2 1/3] target/arm: Do all "ARM_FEATURE_X implies Y" checks in post_init Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20230724174335.2150499-1-peter.maydell@linaro.org> <20230724174335.2150499-2-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20230724174335.2150499-2-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/24/23 10:43, Peter Maydell wrote: > Where architecturally one ARM_FEATURE_X flag implies another > ARM_FEATURE_Y, we allow the CPU init function to only set X, and then > set Y for it. Currently we do this in two places -- we set a few > flags in arm_cpu_post_init() because we need them to decide which > properties to create on the CPU object, and then we do the rest in > arm_cpu_realizefn(). However, this is fragile, because it's easy to > add a new property and not notice that this means that an X-implies-Y > check now has to move from realize to post-init. > > As a specific example, the pmsav7-dregion property is conditional > on ARM_FEATURE_PMSA && ARM_FEATURE_V7, which means it won't appear > on the Cortex-M33 and -M55, because they set ARM_FEATURE_V8 and > rely on V8-implies-V7, which doesn't happen until the realizefn. > > Move all of these X-implies-Y checks into a new function, which > we call at the top of arm_cpu_post_init(), so the feature bits > are available at that point. > > This does now give us the reverse issue, that if there's a feature > bit which is enabled or disabled by the setting of a property then > then X-implies-Y features that are dependent on that property need to > be in realize, not in this new function. But the only one of those > is the "EL3 implies VBAR" which is already in the right place, so > putting things this way round seems better to me. > > Signed-off-by: Peter Maydell > --- > target/arm/cpu.c | 176 +++++++++++++++++++++++++---------------------- > 1 file changed, 94 insertions(+), 82 deletions(-) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 69e2bde3c2d..58301c4b7d8 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1356,17 +1356,105 @@ unsigned int gt_cntfrq_period_ns(ARMCPU *cpu) > NANOSECONDS_PER_SECOND / cpu->gt_cntfrq_hz : 1; > } > > +static void arm_cpu_propagate_feature_implications(ARMCPU *cpu) > +{ > + CPUARMState *env = &cpu->env; > + bool no_aa32 = false; > + /* > + * Some features automatically imply others: set the feature Spacing after local vars. > + if (arm_feature(env, ARM_FEATURE_V7VE)) { > + /* v7 Virtualization Extensions. In real hardware this implies Should fix the comment formatting. Otherwise, Reviewed-by: Richard Henderson I thought I had tried this myself at some point, and ran into a problem. But I can't recall the specifics now. r~