From: Richard Henderson <richard.henderson@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Thomas Huth <thuth@redhat.com>,
cohuck@redhat.com, "open list:S390" <qemu-s390x@nongnu.org>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH v2 4/7] softfloat: fallback to __int128 maths for s390x and others
Date: Thu, 17 Jan 2019 09:17:21 +1100 [thread overview]
Message-ID: <1bef2aae-06dc-5062-4ce6-8e2e9adefb46@linaro.org> (raw)
In-Reply-To: <20190116202349.29272-5-alex.bennee@linaro.org>
On 1/17/19 7:23 AM, Alex Bennée wrote:
> Apparently some versions of clang can't handle inline assembly with
> __int128 parameters, especially on s390. Instead of hand-coding the
> s390 divide provide a generic fallback for anything that provides
> __int128 capable maths.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Cc: Thomas Huth <thuth@redhat.com>
> ---
> include/fpu/softfloat-macros.h | 10 ++++------
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
> index b1d772e6d4..1a43609eef 100644
> --- a/include/fpu/softfloat-macros.h
> +++ b/include/fpu/softfloat-macros.h
> @@ -641,12 +641,6 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,
> uint64_t q;
> asm("divq %4" : "=a"(q), "=d"(*r) : "0"(n0), "1"(n1), "rm"(d));
> return q;
> -#elif defined(__s390x__)
> - /* Need to use a TImode type to get an even register pair for DLGR. */
> - unsigned __int128 n = (unsigned __int128)n1 << 64 | n0;
> - asm("dlgr %0, %1" : "+r"(n) : "r"(d));
> - *r = n >> 64;
> - return n;
> #elif defined(_ARCH_PPC64) && defined(_ARCH_PWR7)
> /* From Power ISA 2.06, programming note for divdeu. */
> uint64_t q1, q2, Q, r1, r2, R;
> @@ -663,6 +657,10 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,
> }
> *r = R;
> return Q;
> +#elif defined(CONFIG_INT128)
> + unsigned __int128 n = (unsigned __int128)n1 << 64 | n0;
> + *r = n % d;
> + return n / d;
> #else
I thought that we'd shown that, at least at present, no compiler is taking
advantage of hardware insns for this, and is promoting this to a full 128-bit
divide. And further that the version using 64-bit arithmetic was competitive
with the hardware insn.
I'd rather not include this hunk for now.
r~
next prev parent reply other threads:[~2019-01-16 22:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-16 20:23 [Qemu-devel] [PATCH v2 0/7] current fpu/next queue Alex Bennée
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 1/7] fp-bench: fix update_random_ops Alex Bennée
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 2/7] fp-bench: remove wrong exponent raise in fill_random Alex Bennée
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 3/7] softfloat: enforce softfloat if the host's FMA is broken Alex Bennée
2019-01-16 22:13 ` Richard Henderson
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 4/7] softfloat: fallback to __int128 maths for s390x and others Alex Bennée
2019-01-16 22:17 ` Richard Henderson [this message]
2019-01-17 7:48 ` Alex Bennée
2019-01-17 6:08 ` Thomas Huth
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 5/7] tests/Makefile: add floating point tests Alex Bennée
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 6/7] scripts/archive-source: include softfloat tests Alex Bennée
2019-01-16 20:23 ` [Qemu-devel] [PATCH v2 7/7] tests/Makfile: add check-softfloat rule Alex Bennée
2019-01-16 22:18 ` Richard Henderson
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