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[88.21.202.183]) by smtp.gmail.com with ESMTPSA id b2sm3676649wrp.72.2019.06.03.23.38.36 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Mon, 03 Jun 2019 23:38:36 -0700 (PDT) To: Richard Henderson , qemu-devel@nongnu.org References: <20190531134315.4109-1-richard.henderson@linaro.org> <20190531134315.4109-17-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: <1c0e8496-6005-f875-a7ee-5913a485fd08@redhat.com> Date: Tue, 4 Jun 2019 08:38:35 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190531134315.4109-17-richard.henderson@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.67 Subject: Re: [Qemu-devel] [PATCH v16 16/23] Add rx-softmmu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ysato@users.sourceforge.jp Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Richard, On 5/31/19 3:43 PM, Richard Henderson wrote: > From: Yoshinori Sato > > Tested-by: Philippe Mathieu-Daudé > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Yoshinori Sato > Message-Id: <20190516055244.95559-10-ysato@users.sourceforge.jp> > Signed-off-by: Richard Henderson > --- > include/sysemu/arch_init.h | 1 + > arch_init.c | 2 ++ > configure | 8 ++++++++ > default-configs/rx-softmmu.mak | 3 +++ > hw/Kconfig | 1 + > 5 files changed, 15 insertions(+) > create mode 100644 default-configs/rx-softmmu.mak > > diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h > index 10cbafe970..3f4f844f7b 100644 > --- a/include/sysemu/arch_init.h > +++ b/include/sysemu/arch_init.h > @@ -25,6 +25,7 @@ enum { > QEMU_ARCH_NIOS2 = (1 << 17), > QEMU_ARCH_HPPA = (1 << 18), > QEMU_ARCH_RISCV = (1 << 19), > + QEMU_ARCH_RX = (1 << 20), > }; > > extern const uint32_t arch_type; > diff --git a/arch_init.c b/arch_init.c > index f4f3f610c8..cc25ddd7ca 100644 > --- a/arch_init.c > +++ b/arch_init.c > @@ -74,6 +74,8 @@ int graphic_depth = 32; > #define QEMU_ARCH QEMU_ARCH_PPC > #elif defined(TARGET_RISCV) > #define QEMU_ARCH QEMU_ARCH_RISCV > +#elif defined(TARGET_RX) > +#define QEMU_ARCH QEMU_ARCH_RX > #elif defined(TARGET_S390X) > #define QEMU_ARCH QEMU_ARCH_S390X > #elif defined(TARGET_SH4) > diff --git a/configure b/configure > index 6cdcfb2dc3..7e5477e487 100755 > --- a/configure > +++ b/configure > @@ -7605,6 +7605,11 @@ case "$target_name" in > gdb_xml_files="riscv-64bit-cpu.xml riscv-64bit-fpu.xml riscv-64bit-csr.xml" > target_compiler=$cross_cc_riscv64 > ;; > + rx) > + TARGET_ARCH=rx > + bflt="yes" > + target_compiler=$cross_cc_rx > + ;; > sh4|sh4eb) > TARGET_ARCH=sh4 > bflt="yes" > @@ -7825,6 +7830,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do > riscv*) > disas_config "RISCV" > ;; > + rx) > + disas_config "RX" > + ;; > s390*) > disas_config "S390" > ;; > diff --git a/default-configs/rx-softmmu.mak b/default-configs/rx-softmmu.mak > new file mode 100644 > index 0000000000..a3eecefb11 > --- /dev/null > +++ b/default-configs/rx-softmmu.mak > @@ -0,0 +1,3 @@ > +# Default configuration for rx-softmmu > + > +CONFIG_RX_VIRT=y > diff --git a/hw/Kconfig b/hw/Kconfig > index 195f541e50..b0c7221240 100644 > --- a/hw/Kconfig > +++ b/hw/Kconfig > @@ -54,6 +54,7 @@ source nios2/Kconfig > source openrisc/Kconfig > source ppc/Kconfig > source riscv/Kconfig > +source rx/Kconfig > source s390x/Kconfig > source sh4/Kconfig > source sparc/Kconfig > Please squash in: -- >8 -- --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -26,6 +26,7 @@ #pragma GCC poison TARGET_PPC #pragma GCC poison TARGET_PPC64 #pragma GCC poison TARGET_ABI32 +#pragma GCC poison TARGET_RX #pragma GCC poison TARGET_S390X #pragma GCC poison TARGET_SH4 #pragma GCC poison TARGET_SPARC --- Thanks! Phil.