Re: [PATCH] target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk

[Richard Henderson <richard.henderson@linaro.org>]

On 10/31/23 10:37, Peter Maydell wrote:
> In a two-stage translation, the result of the BTI guarded bit should
> be the guarded bit from the first stage of translation, as there is
> no BTI guard information in stage two.  Our code tried to do this,
> but got it wrong, because we currently have two fields where the GP
> bit information might live (ARMCacheAttrs::guarded and
> CPUTLBEntryFull::extra::arm::guarded), and we were storing the GP bit
> in the latter during the stage 1 walk but trying to copy the former
> in combine_cacheattrs().
> 
> Remove the duplicated storage, and always use the field in
> CPUTLBEntryFull; correctly propagate the stage 1 value to the output
> in get_phys_addr_twostage().
> 
> Note for stable backports: in v8.0 and earlier the field is named
> result->f.guarded, not result->f.extra.arm.guarded.
> 
> Cc: qemu-stable@nongnu.org
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1950
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/arm/internals.h | 1 -
>   target/arm/ptw.c       | 7 +++++--
>   2 files changed, 5 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~