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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	qemu-riscv@nongnu.org,
	Alistair Francis <alistair.francis@wdc.com>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Bin Meng <bmeng.cn@gmail.com>, Weiwei Li <liwei1518@gmail.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH 2/7] target/riscv: Move target-agnostic definitions to 'cpu-qom.h'
Date: Sat, 8 Feb 2025 17:51:17 +0100	[thread overview]
Message-ID: <1d2986d2-4364-491f-a2df-331115edb23a@linaro.org> (raw)
In-Reply-To: <20250206181827.41557-3-philmd@linaro.org>

On 6/2/25 19:18, Philippe Mathieu-Daudé wrote:
> "cpu.h" is target-specific. Definitions which can be used
> by hw/ code when building QOM blocks can be in "cpu-qom.h",
> which is target-agnostic.

What I'm trying to allow here are QOM uses such:

../../hw/riscv/opentitan.c:199:61: error: use of undeclared identifier 
'IRQ_M_EXT'
   199 |                               qdev_get_gpio_in(DEVICE(cpu), 
IRQ_M_EXT));
       |                                                             ^
../../hw/riscv/opentitan.c:230:44: error: use of undeclared identifier 
'IRQ_M_TIMER'; did you mean 'IBEX_TIMER'?
   230 |                                            IRQ_M_TIMER));
       |                                            ^~~~~~~~~~~

> Move the MISA bits (removing the pointless target_ulong cast)
> and the IRQ index definitions.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/riscv/cpu-qom.h  | 40 ++++++++++++++++++++++++++++++++++++++++
>   target/riscv/cpu.h      | 24 ------------------------
>   target/riscv/cpu_bits.h | 15 ---------------
>   3 files changed, 40 insertions(+), 39 deletions(-)



  reply	other threads:[~2025-02-08 16:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-06 18:18 [PATCH 0/7] hw/riscv: Move few units to common_ss[] Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 1/7] MAINTAINERS: Unify Alistair's professional email address Philippe Mathieu-Daudé
2025-02-06 18:19   ` Philippe Mathieu-Daudé
2025-02-06 20:54   ` Richard Henderson
2025-02-10  0:24   ` Alistair Francis
2025-02-06 18:18 ` [PATCH 2/7] target/riscv: Move target-agnostic definitions to 'cpu-qom.h' Philippe Mathieu-Daudé
2025-02-08 16:51   ` Philippe Mathieu-Daudé [this message]
2025-02-09  7:34   ` Paolo Bonzini
2025-03-06  7:47     ` Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 3/7] hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header Philippe Mathieu-Daudé
2025-02-06 20:54   ` Richard Henderson
2025-02-10  0:21   ` Alistair Francis
2025-02-06 18:18 ` [PATCH 4/7] hw/riscv/boot: Use 'hwaddr' type for firmware addresses Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 5/7] hw/riscv/iommu: Reduce needs for target-specific code Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 6/7] hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 7/7] hw/riscv: Move few objects to common_ss[] to build them once Philippe Mathieu-Daudé

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