From: "Cédric Le Goater" <clg@kaod.org>
To: Daniel Henrique Barboza <danielhb413@gmail.com>, <qemu-devel@nongnu.org>
Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org,
david@gibson.dropbear.id.au
Subject: Re: [PATCH 1/8] target/ppc: introduce power8-pmu-insn-cnt.c.inc
Date: Wed, 22 Dec 2021 19:00:14 +0100 [thread overview]
Message-ID: <1d29d20b-0c8c-68a8-cd5b-6d3780ea1b1f@kaod.org> (raw)
In-Reply-To: <20211222134520.587877-2-danielhb413@gmail.com>
On 12/22/21 14:45, Daniel Henrique Barboza wrote:
> We're going to add a significant amount of TCG ops code for
> instruction counting, eventually getting rid of the 'helper_insn_inc'
> helper entirely.
>
> Create a new file to avoid putting even more stuff on the already
> crowded target/ppc/translate.c.
We already have a power8-pmu-regs.c.inc file. Couldn't we use it or is it
a bad idea ?
Thanks,
C.
>
> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> ---
> target/ppc/power8-pmu-insn-cnt.c.inc | 54 ++++++++++++++++++++++++++++
> target/ppc/translate.c | 44 ++---------------------
> 2 files changed, 56 insertions(+), 42 deletions(-)
> create mode 100644 target/ppc/power8-pmu-insn-cnt.c.inc
>
> diff --git a/target/ppc/power8-pmu-insn-cnt.c.inc b/target/ppc/power8-pmu-insn-cnt.c.inc
> new file mode 100644
> index 0000000000..2febbcc27e
> --- /dev/null
> +++ b/target/ppc/power8-pmu-insn-cnt.c.inc
> @@ -0,0 +1,54 @@
> +/*
> + * PMU instruction counting for TCG IBM POWER chips
> + *
> + * Copyright IBM Corp. 2021
> + *
> + * Authors:
> + * Daniel Henrique Barboza <danielhb413@gmail.com>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#if defined(TARGET_PPC64)
> +static void pmu_count_insns(DisasContext *ctx)
> +{
> + /*
> + * Do not bother calling the helper if the PMU isn't counting
> + * instructions.
> + */
> + if (!ctx->pmu_insn_cnt) {
> + return;
> + }
> +
> + #if !defined(CONFIG_USER_ONLY)
> + /*
> + * The PMU insns_inc() helper stops the internal PMU timer if a
> + * counter overflows happens. In that case, if the guest is
> + * running with icount and we do not handle it beforehand,
> + * the helper can trigger a 'bad icount read'.
> + */
> + gen_icount_io_start(ctx);
> +
> + gen_helper_insns_inc(cpu_env, tcg_constant_i32(ctx->base.num_insns));
> +#else
> + /*
> + * User mode can read (but not write) PMC5 and start/stop
> + * the PMU via MMCR0_FC. In this case just increment
> + * PMC5 with base.num_insns.
> + */
> + TCGv t0 = tcg_temp_new();
> +
> + gen_load_spr(t0, SPR_POWER_PMC5);
> + tcg_gen_addi_tl(t0, t0, ctx->base.num_insns);
> + gen_store_spr(SPR_POWER_PMC5, t0);
> +
> + tcg_temp_free(t0);
> +#endif /* #if !defined(CONFIG_USER_ONLY) */
> +}
> +#else
> +static void pmu_count_insns(DisasContext *ctx)
> +{
> + return;
> +}
> +#endif /* #if defined(TARGET_PPC64) */
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 114456148c..44773bc6cd 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -4183,48 +4183,8 @@ static inline void gen_update_cfar(DisasContext *ctx, target_ulong nip)
> #endif
> }
>
> -#if defined(TARGET_PPC64)
> -static void pmu_count_insns(DisasContext *ctx)
> -{
> - /*
> - * Do not bother calling the helper if the PMU isn't counting
> - * instructions.
> - */
> - if (!ctx->pmu_insn_cnt) {
> - return;
> - }
> -
> - #if !defined(CONFIG_USER_ONLY)
> - /*
> - * The PMU insns_inc() helper stops the internal PMU timer if a
> - * counter overflows happens. In that case, if the guest is
> - * running with icount and we do not handle it beforehand,
> - * the helper can trigger a 'bad icount read'.
> - */
> - gen_icount_io_start(ctx);
> -
> - gen_helper_insns_inc(cpu_env, tcg_constant_i32(ctx->base.num_insns));
> -#else
> - /*
> - * User mode can read (but not write) PMC5 and start/stop
> - * the PMU via MMCR0_FC. In this case just increment
> - * PMC5 with base.num_insns.
> - */
> - TCGv t0 = tcg_temp_new();
> -
> - gen_load_spr(t0, SPR_POWER_PMC5);
> - tcg_gen_addi_tl(t0, t0, ctx->base.num_insns);
> - gen_store_spr(SPR_POWER_PMC5, t0);
> -
> - tcg_temp_free(t0);
> -#endif /* #if !defined(CONFIG_USER_ONLY) */
> -}
> -#else
> -static void pmu_count_insns(DisasContext *ctx)
> -{
> - return;
> -}
> -#endif /* #if defined(TARGET_PPC64) */
> +/* For pmu_count_insns */
> +#include "target/ppc/power8-pmu-insn-cnt.c.inc"
>
> static inline bool use_goto_tb(DisasContext *ctx, target_ulong dest)
> {
>
next prev parent reply other threads:[~2021-12-22 18:03 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-22 13:45 [PATCH 0/8] Re-write PPC64 PMU instruction count using TCG Ops Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 1/8] target/ppc: introduce power8-pmu-insn-cnt.c.inc Daniel Henrique Barboza
2021-12-22 18:00 ` Cédric Le Goater [this message]
2021-12-22 18:10 ` Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 2/8] target/ppc/power8-pmu-insn-cnt: add pmu_inc_pmc5() Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 3/8] target/ppc/power8-pmu-insn-cnt: add pmu_inc_pmc1() Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 4/8] target/ppc/power8-pmu-insn-cnt: add pmu_inc_pmc2() Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 5/8] target/ppc/power8-pmu-insn-cnt: add pmu_inc_pmc3() Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 6/8] target/ppc/power8-pmu-insn-cnt.c: add pmu_inc_pmc4() Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 7/8] target/ppc/power8-pmu-insn-cnt: add pmu_check_overflow() Daniel Henrique Barboza
2021-12-22 13:45 ` [PATCH 8/8] target/ppc/power8-pmu.c: remove helper_insns_inc() Daniel Henrique Barboza
2021-12-23 2:43 ` [PATCH 0/8] Re-write PPC64 PMU instruction count using TCG Ops Richard Henderson
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