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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4406d6db131sm179446685e9.28.2025.04.22.09.42.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 22 Apr 2025 09:42:25 -0700 (PDT) Message-ID: <1d6adf81-15fe-43c5-87a4-45974e6a8a68@linaro.org> Date: Tue, 22 Apr 2025 18:42:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 149/163] tcg: Remove add2/sub2 opcodes To: Richard Henderson , qemu-devel@nongnu.org References: <20250415192515.232910-1-richard.henderson@linaro.org> <20250415192515.232910-150-richard.henderson@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20250415192515.232910-150-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 15/4/25 21:25, Richard Henderson wrote: > All uses have been replaced by add/sub carry opcodes. > > Signed-off-by: Richard Henderson > --- > include/tcg/tcg-opc.h | 5 -- > tcg/aarch64/tcg-target-has.h | 5 -- > tcg/arm/tcg-target-has.h | 4 -- > tcg/i386/tcg-target-has.h | 5 -- > tcg/loongarch64/tcg-target-has.h | 4 -- > tcg/mips/tcg-target-has.h | 5 -- > tcg/ppc/tcg-target-has.h | 4 -- > tcg/riscv/tcg-target-has.h | 5 -- > tcg/s390x/tcg-target-has.h | 7 --- > tcg/sparc64/tcg-target-has.h | 7 --- > tcg/tcg-has.h | 2 - > tcg/tci/tcg-target-has.h | 4 -- > tcg/optimize.c | 87 -------------------------------- > tcg/tcg-op.c | 26 ---------- > tcg/tcg.c | 36 ------------- > 15 files changed, 206 deletions(-) Missing doc removal: -- >8 -- diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst index 93bcc706399..bef00ad835a 100644 --- a/docs/devel/tcg-ops.rst +++ b/docs/devel/tcg-ops.rst @@ -654,14 +654,6 @@ Multiword arithmetic support code generator will use ``tcg_out_set_borrow`` and then the output routine for *subbio*. - * - add2_i32/i64 *t0_low*, *t0_high*, *t1_low*, *t1_high*, *t2_low*, *t2_high* - - sub2_i32/i64 *t0_low*, *t0_high*, *t1_low*, *t1_high*, *t2_low*, *t2_high* - - - | Similar to add/sub, except that the double-word inputs *t1* and *t2* are - formed from two single-word arguments, and the double-word output *t0* - is returned in two single-word outputs. - * - mulu2 *t0_low*, *t0_high*, *t1*, *t2* - | Similar to mul, except two unsigned inputs *t1* and *t2* yielding the full @@ -953,8 +945,7 @@ The target word size (``TCG_TARGET_REG_BITS``) is expected to be 32 bit or 64 bit. It is expected that the pointer has the same size as the word. On a 32 bit target, all 64 bit operations are converted to 32 bits. A -few specific operations must be implemented to allow it (see add2_i32, -sub2_i32, brcond2_i32). +few specific operations must be implemented to allow it (see brcond2_i32). On a 64 bit target, the values are transferred between 32 and 64-bit registers using the following ops: --- Updating docs/devel/tcg-ops.rst: Reviewed-by: Philippe Mathieu-Daudé