From: "Andrew Jeffery" <andrew@aj.id.au>
To: "Cédric Le Goater" <clg@kaod.org>, qemu-arm@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Joel Stanley <joel@jms.id.au>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v2 0/2] hw/arm: ast2600: Wire up eMMC controller
Date: Fri, 13 Dec 2019 18:07:11 +1030 [thread overview]
Message-ID: <1d96ac9b-5eb2-43ec-bf21-334ee3fa4420@www.fastmail.com> (raw)
In-Reply-To: <16c90bb0-a3a9-06ec-e79a-bd98471d9e11@kaod.org>
On Fri, 13 Dec 2019, at 18:03, Cédric Le Goater wrote:
> On 13/12/2019 05:28, Andrew Jeffery wrote:
> > Hello,
> >
> > The AST2600 has an additional SDHCI intended for use as an eMMC boot source.
> > These two patches rework the existing ASPEED SDHCI model to accommodate the
> > single-slot nature of the eMMC controller and wire it into the AST2600 SoC.
> >
> > v2 contains some minor refactorings in response to issues pointed out by
> > Cedric.
>
>
> I think these patches are based on mainline. I fixed them locally on
> my aspeed 5.0 branch and I plan to send them along with other aspeed
> changes in the 5.0 timeframe.
Yeah, they're based on Peter's tree. I'll base future patches on yours.
Andrew
next prev parent reply other threads:[~2019-12-13 7:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-13 4:28 [PATCH v2 0/2] hw/arm: ast2600: Wire up eMMC controller Andrew Jeffery
2019-12-13 4:28 ` [PATCH v2 1/2] hw/sd: Configure number of slots exposed by the ASPEED SDHCI model Andrew Jeffery
2019-12-13 7:29 ` Cédric Le Goater
2019-12-13 4:28 ` [PATCH v2 2/2] hw/arm: ast2600: Wire up the eMMC controller Andrew Jeffery
2019-12-13 7:30 ` Cédric Le Goater
2019-12-13 7:33 ` [PATCH v2 0/2] hw/arm: ast2600: Wire up " Cédric Le Goater
2019-12-13 7:37 ` Andrew Jeffery [this message]
2019-12-13 17:04 ` Philippe Mathieu-Daudé
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