Re: [PATCH v1 3/5] hw/arm/npcm8xx.c: Add all IRQ ENUMs

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 26/9/25 23:48, Coco Li wrote:
> Hi Phil,
> 
> Thanks for the review!
> It looks like IRQ mapping enums on other boards also generally do not 
> have line breaks, is it ok if I keep it like this for consistency sake?

This is just a suggestion, since you are modifying these lines. I
won't object if you keep the old style, and I don't mind if the
other boards as not changed (also, can be done as future cleanup).

(please avoid top-posting on technical mailing lists).

> 
> Best,
> Coco
> 
> On Wed, Sep 24, 2025 at 6:08 PM Philippe Mathieu-Daudé 
> <philmd@linaro.org <mailto:philmd@linaro.org>> wrote:
> 
>     Hi,
> 
>     On 25/9/25 02:58, Coco Li wrote:
>      > In the process of implementing serial gpio and adding the
>     corresponding
>      > ENUMs, also complete the list for npcm8xx.
>      >
>      > Signed-off-by: Coco Li <lixiaoyan@google.com
>     <mailto:lixiaoyan@google.com>>
>      > Reviewed-by: Hao Wu <wuhaotsh@google.com
>     <mailto:wuhaotsh@google.com>>
>      > ---
>      >   hw/arm/npcm8xx.c | 43 ++++++++++++++++++++++++++++++++++++++++++-
>      >   1 file changed, 42 insertions(+), 1 deletion(-)
>      >
>      > diff --git a/hw/arm/npcm8xx.c b/hw/arm/npcm8xx.c
>      > index a276fea698..10887d07fa 100644
>      > --- a/hw/arm/npcm8xx.c
>      > +++ b/hw/arm/npcm8xx.c
>      > @@ -92,8 +92,14 @@ enum NPCM8xxInterrupt {
>      >       NPCM8XX_GMAC2_IRQ,
>      >       NPCM8XX_GMAC3_IRQ,
>      >       NPCM8XX_GMAC4_IRQ,
>      > -    NPCM8XX_MMC_IRQ             = 26,
>      > +    NPCM8XX_ESPI_IRQ,
>      > +    NPCM8XX_SIOX0_IRQ,
>      > +    NPCM8XX_SIOX1_IRQ,
>      > +    NPCM8XX_MC_IRQ              = 25,
>      > +    NPCM8XX_MMC_IRQ,
>      >       NPCM8XX_PSPI_IRQ            = 28,
>      > +    NPCM8XX_VDMA_IRQ,
>      > +    NPCM8XX_MCTP_IRQ,
>      >       NPCM8XX_TIMER0_IRQ          = 32,   /* Timer Module 0 */
>      >       NPCM8XX_TIMER1_IRQ,
>      >       NPCM8XX_TIMER2_IRQ,
>      > @@ -116,6 +122,14 @@ enum NPCM8xxInterrupt {
>      >       NPCM8XX_OHCI1_IRQ,
>      >       NPCM8XX_EHCI2_IRQ,
>      >       NPCM8XX_OHCI2_IRQ,
>      > +    NPCM8XX_SPI1_IRQ            = 82,
>      > +    NPCM8XX_RNG_IRQ             = 84,
>      > +    NPCM8XX_SPI0_IRQ            = 85,
>      > +    NPCM8XX_SPI3_IRQ            = 87,
>      > +    NPCM8XX_GDMA0_IRQ           = 88,
>      > +    NPCM8XX_GDMA1_IRQ,
>      > +    NPCM8XX_GDMA2_IRQ,
>      > +    NPCM8XX_OTP_IRQ             = 92,
>      >       NPCM8XX_PWM0_IRQ            = 93,   /* PWM module 0 */
>      >       NPCM8XX_PWM1_IRQ,                   /* PWM module 1 */
>      >       NPCM8XX_MFT0_IRQ            = 96,   /* MFT module 0 */
>      > @@ -128,6 +142,11 @@ enum NPCM8xxInterrupt {
>      >       NPCM8XX_MFT7_IRQ,                   /* MFT module 7 */
>      >       NPCM8XX_PCI_MBOX1_IRQ       = 105,
>      >       NPCM8XX_PCI_MBOX2_IRQ,
>      > +    NPCM8XX_GPIO231_IRQ         = 108,
>      > +    NPCM8XX_GPIO233_IRQ,
>      > +    NPCM8XX_GPIO234_IRQ,
>      > +    NPCM8XX_GPIO93_IRQ,
>      > +    NPCM8XX_GPIO94_IRQ,
>      >       NPCM8XX_GPIO0_IRQ           = 116,
>      >       NPCM8XX_GPIO1_IRQ,
>      >       NPCM8XX_GPIO2_IRQ,
>      > @@ -163,6 +182,12 @@ enum NPCM8xxInterrupt {
>      >       NPCM8XX_SMBUS24_IRQ,
>      >       NPCM8XX_SMBUS25_IRQ,
>      >       NPCM8XX_SMBUS26_IRQ,
>      > +    NPCM8XX_FLM0_IRQ            = 160,
>      > +    NPCM8XX_FLM1_IRQ,
>      > +    NPCM8XX_FLM2_IRQ,
>      > +    NPCM8XX_FLM3_IRQ,
> 
>     Minor style comment, maybe worth adding a new line when the
>     following enum is not contiguous.
> 
>     Regards,
> 
>     Phil.