From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: "Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-devel@nongnu.org
Cc: Anton Johansson <anjo@rev.ng>
Subject: Re: [RFC PATCH v4 11/19] hw/core/machine: Allow dynamic registration of valid CPU types
Date: Tue, 22 Apr 2025 11:06:07 -0700 [thread overview]
Message-ID: <1f00ced1-429f-476f-bb39-6e0db0e0c0cc@linaro.org> (raw)
In-Reply-To: <0ca405b8-77f8-452e-ba09-0ba820f64d6f@linaro.org>
On 4/22/25 10:54, Richard Henderson wrote:
> On 4/22/25 07:54, Philippe Mathieu-Daudé wrote:
>> index f52a4f2273b..8b40735ef98 100644
>> --- a/hw/core/machine.c
>> +++ b/hw/core/machine.c
>> @@ -1581,6 +1581,33 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
>> return false;
>> }
>> }
>> + if (mc->get_valid_cpu_types) {
>> + GSList *vct = mc->get_valid_cpu_types(machine);
>> + bool valid = false;
>> + unsigned count = 0;
>> + GSList *l;
>> +
>> + for (l = vct; !valid && l != NULL; l = l->next) {
>> + valid |= !!object_class_dynamic_cast(oc, l->data);
>> + count++;
>> + }
>> +
>> + if (!valid) {
>> + g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
>> + vct = g_slist_reverse(vct);
>> + error_setg(errp, "Invalid CPU model: %s", requested);
>> + error_append_hint(errp, "The valid models are: ");
>> + for (l = vct; l != NULL; l = l->next) {
>> + g_autofree char *model = cpu_model_from_type(l->data);
>> + error_append_hint(errp, "%s%s", model, --count ? ", " : "");
>> + }
>> + error_append_hint(errp, "\n");
>> + }
>> + g_slist_free_full(vct, g_free);
>> + if (!valid) {
>> + return false;
>> + }
>> + }
>
> Why use GSList instead of GPtrArray?
> That would provide you the count without manually computing it,
> and it would avoid the need for any sort of reverse.
> I think it would also allow you to auto-free the set.
>
Same remark than Richard, it would remove all the checks needed, as we
can simply use this array "blindly".
>
> r~
next prev parent reply other threads:[~2025-04-22 18:06 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-22 14:54 [RFC PATCH v4 00/19] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-04-22 14:54 ` [RFC PATCH v4 01/19] qapi: Rename TargetInfo structure as QemuTargetInfo Philippe Mathieu-Daudé
2025-04-22 14:57 ` Philippe Mathieu-Daudé
2025-04-22 17:33 ` Markus Armbruster
2025-04-22 14:54 ` [RFC PATCH v4 02/19] qemu: Convert target_name() to TargetInfo API Philippe Mathieu-Daudé
2025-04-22 17:27 ` Richard Henderson
2025-04-22 17:28 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 03/19] system/vl: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
2025-04-22 17:29 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 04/19] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé
2025-04-22 17:31 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 05/19] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
2025-04-22 17:34 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 06/19] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé
2025-04-22 17:40 ` Richard Henderson
2025-04-23 16:34 ` Philippe Mathieu-Daudé
2025-04-23 17:43 ` Pierrick Bouvier
2025-04-23 19:12 ` Richard Henderson
2025-04-23 19:33 ` Pierrick Bouvier
2025-04-23 19:53 ` Philippe Mathieu-Daudé
2025-04-23 20:10 ` Pierrick Bouvier
2025-04-23 20:04 ` Richard Henderson
2025-04-23 20:12 ` Pierrick Bouvier
2025-04-23 17:07 ` Philippe Mathieu-Daudé
2025-04-22 14:54 ` [RFC PATCH v4 07/19] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé
2025-04-22 17:41 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 08/19] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé
2025-04-22 17:42 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 09/19] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-04-22 17:42 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 10/19] hw/arm/raspi: " Philippe Mathieu-Daudé
2025-04-22 17:43 ` Richard Henderson
2025-04-22 14:54 ` [RFC PATCH v4 11/19] hw/core/machine: Allow dynamic registration of valid CPU types Philippe Mathieu-Daudé
2025-04-22 17:54 ` Richard Henderson
2025-04-22 18:06 ` Pierrick Bouvier [this message]
2025-04-22 14:54 ` [RFC PATCH v4 12/19] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé
2025-04-22 17:56 ` Richard Henderson
2025-04-22 18:10 ` Pierrick Bouvier
2025-04-22 18:18 ` Philippe Mathieu-Daudé
2025-04-22 14:54 ` [RFC PATCH v4 13/19] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé
2025-04-22 17:56 ` Richard Henderson
2025-04-22 18:18 ` Pierrick Bouvier
2025-04-22 14:54 ` [RFC PATCH v4 14/19] qemu/target_info: Add %target_arch field to TargetInfo Philippe Mathieu-Daudé
2025-04-22 17:46 ` Richard Henderson
2025-04-22 18:20 ` Pierrick Bouvier
2025-04-22 18:24 ` Philippe Mathieu-Daudé
2025-04-22 18:30 ` Pierrick Bouvier
2025-04-23 5:34 ` Philippe Mathieu-Daudé
2025-04-23 6:24 ` Pierrick Bouvier
2025-04-23 6:28 ` Pierrick Bouvier
2025-04-23 9:14 ` Philippe Mathieu-Daudé
2025-04-23 14:59 ` Pierrick Bouvier
2025-04-22 14:54 ` [RFC PATCH v4 15/19] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé
2025-04-22 17:46 ` Richard Henderson
2025-04-22 18:21 ` Pierrick Bouvier
2025-04-22 14:54 ` [RFC PATCH v4 16/19] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé
2025-04-22 17:47 ` Richard Henderson
2025-04-22 18:22 ` Pierrick Bouvier
2025-04-22 14:54 ` [RFC PATCH v4 17/19] hw/core: Get default_cpu_type calling machine_class_default_cpu_type() Philippe Mathieu-Daudé
2025-04-22 17:58 ` Richard Henderson
2025-04-22 18:23 ` Pierrick Bouvier
2025-04-22 14:55 ` [RFC PATCH v4 18/19] hw/core: Introduce MachineClass::get_default_cpu_type() helper Philippe Mathieu-Daudé
2025-04-22 17:59 ` Richard Henderson
2025-04-22 18:24 ` Pierrick Bouvier
2025-04-22 14:55 ` [RFC PATCH v4 19/19] hw/arm/virt: Get default CPU type at runtime Philippe Mathieu-Daudé
2025-04-22 18:06 ` Richard Henderson
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