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[71.212.39.66]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-220d534935csm75150715ad.50.2025.02.17.10.45.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Feb 2025 10:45:39 -0800 (PST) Message-ID: <1f45661f-4aff-40fc-a86d-fc5abea8e019@linaro.org> Date: Mon, 17 Feb 2025 10:45:37 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/10] fpu: Make floatx80 invalid encoding settable at runtime To: Peter Maydell , qemu-devel@nongnu.org Cc: =?UTF-8?Q?Alex_Benn=C3=A9e?= , Paolo Bonzini , Eduardo Habkost , Laurent Vivier References: <20250217125055.160887-1-peter.maydell@linaro.org> <20250217125055.160887-6-peter.maydell@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20250217125055.160887-6-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/17/25 04:50, Peter Maydell wrote: > Because floatx80 has an explicit integer bit, this permits some > odd encodings where the integer bit is not set correctly for the > floating point value type. In In Intel terminology the > categories are: > exp == 0, int = 0, mantissa == 0 : zeroes > exp == 0, int = 0, mantissa != 0 : denormals > exp == 0, int = 1 : pseudo-denormals > 0 < exp < 0x7fff, int = 0 : unnormals > 0 < exp < 0x7fff, int = 1 : normals > exp == 0x7fff, int = 0, mantissa == 0 : pseudo-infinities > exp == 0x7fff, int = 1, mantissa == 0 : infinities > exp == 0x7fff, int = 0, mantissa != 0 : pseudo-NaNs > exp == 0x7fff, int = 1, mantissa == 0 : NaNs > > The usual IEEE cases of zero, denormal, normal, inf and NaN are always valid. > x87 permits as input also pseudo-denormals. > m68k permits all those and also pseudo-infinities, pseudo-NaNs and unnormals. > > Currently we have an ifdef in floatx80_invalid_encoding() to select > the x86 vs m68k behaviour. Add new floatx80_behaviour flags to > select whether pseudo-NaN and unnormal are valid, and use these > (plus the existing pseudo_inf_valid flag) to decide whether these > encodings are invalid at runtime. > > We leave pseudo-denormals as always-valid, since both x86 and m68k > accept them. > > Signed-off-by: Peter Maydell > --- > include/fpu/softfloat-types.h | 14 +++++++ > include/fpu/softfloat.h | 70 ++++++++++++++++++----------------- > fpu/softfloat.c | 2 +- > target/i386/tcg/fpu_helper.c | 24 ++++++------ > target/m68k/cpu.c | 28 +++++++++++++- > 5 files changed, 92 insertions(+), 46 deletions(-) Reviewed-by: Richard Henderson r~