From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3463C54E66 for ; Tue, 12 Mar 2024 08:08:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rjxAk-0003Qo-53; Tue, 12 Mar 2024 04:07:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rjxAH-0002zJ-Jo; Tue, 12 Mar 2024 04:07:16 -0400 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3] helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rjxAB-0005rs-1B; Tue, 12 Mar 2024 04:07:11 -0400 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4Tv5pC0XZZz4wcT; Tue, 12 Mar 2024 19:06:59 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4Tv5p82FFQz4wqN; Tue, 12 Mar 2024 19:06:55 +1100 (AEDT) Message-ID: <1f4b97ec-2cf0-4619-a3d1-6aae6e609ec3@kaod.org> Date: Tue, 12 Mar 2024 09:06:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/13] ppc/pnv: Set POWER9, POWER10 ibm,pa-features bits Content-Language: en-US, fr To: Nicholas Piggin , qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora , =?UTF-8?B?RnLDqWTDqXJpYyBCYXJyYXQ=?= References: <20240311185200.2185753-1-npiggin@gmail.com> <20240311185200.2185753-9-npiggin@gmail.com> From: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= In-Reply-To: <20240311185200.2185753-9-npiggin@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=j0G5=KS=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/11/24 19:51, Nicholas Piggin wrote: > Copy the pa-features arrays from spapr, adjusting slightly as > described in comments. > > Cc: "Cédric Le Goater" > Cc: "Frédéric Barrat" > Signed-off-by: Nicholas Piggin > --- > hw/ppc/pnv.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++-- > hw/ppc/spapr.c | 1 + > 2 files changed, 66 insertions(+), 2 deletions(-) > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index 52d964f77a..3e30c08420 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -332,6 +332,35 @@ static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt) > } > } > > +/* > + * Same as spapr pa_features_300 except pnv always enables CI largepages bit. > + */ > +static const uint8_t pa_features_300[] = { 66, 0, > + /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: CILRG|fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */ > + /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, 5: LE|CFAR|EB|LSQ */ > + 0xf6, 0x3f, 0xc7, 0xc0, 0x00, 0xf0, /* 0 - 5 */ > + /* 6: DS207 */ > + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ > + /* 16: Vector */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ > + /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 18 - 23 */ > + /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ > + /* 32: LE atomic, 34: EBB + ext EBB */ > + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ > + /* 40: Radix MMU */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ > + /* 42: PM, 44: PC RA, 46: SC vec'd */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ > + /* 48: SIMD, 50: QP BFP, 52: String */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */ > + /* 54: DecFP, 56: DecI, 58: SHA */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */ > + /* 60: NM atomic, 62: RNG */ > + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */ > +}; > + > static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) > { > static const char compat[] = "ibm,power9-xscom\0ibm,xscom"; > @@ -349,7 +378,7 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) > offset = pnv_dt_core(chip, pnv_core, fdt); > > _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", > - pa_features_207, sizeof(pa_features_207)))); > + pa_features_300, sizeof(pa_features_300)))); > } > > if (chip->ram_size) { > @@ -359,6 +388,40 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) > pnv_dt_lpc(chip, fdt, 0, PNV9_LPCM_BASE(chip), PNV9_LPCM_SIZE); > } > > +/* > + * Same as spapr pa_features_31 except pnv always enables CI largepages bit, > + * always disables copy/paste. > + */ > +static const uint8_t pa_features_31[] = { 74, 0, > + /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: CILRG|fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */ > + /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, 5: LE|CFAR|EB|LSQ */ > + 0xf6, 0x3f, 0xc7, 0xc0, 0x00, 0xf0, /* 0 - 5 */ > + /* 6: DS207 */ > + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ > + /* 16: Vector */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ > + /* 18: Vec. Scalar, 20: Vec. XOR */ > + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */ > + /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ > + /* 32: LE atomic, 34: EBB + ext EBB */ > + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ > + /* 40: Radix MMU */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ > + /* 42: PM, 44: PC RA, 46: SC vec'd */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ > + /* 48: SIMD, 50: QP BFP, 52: String */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */ > + /* 54: DecFP, 56: DecI, 58: SHA */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */ > + /* 60: NM atomic, 62: RNG */ > + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */ > + /* 68: DEXCR[SBHE|IBRTPDUS|SRAPD|NPHIE|PHIE] */ > + 0x00, 0x00, 0xce, 0x00, 0x00, 0x00, /* 66 - 71 */ > + /* 72: [P]HASHCHK */ > + 0x80, 0x00, /* 72 - 73 */ > +}; > + > static void pnv_chip_power10_dt_populate(PnvChip *chip, void *fdt) > { > static const char compat[] = "ibm,power10-xscom\0ibm,xscom"; > @@ -376,7 +439,7 @@ static void pnv_chip_power10_dt_populate(PnvChip *chip, void *fdt) > offset = pnv_dt_core(chip, pnv_core, fdt); > > _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", > - pa_features_207, sizeof(pa_features_207)))); > + pa_features_31, sizeof(pa_features_31)))); > } > > if (chip->ram_size) { > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index 128bfe11a8..b53c13e037 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -233,6 +233,7 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr, > PowerPCCPU *cpu, > void *fdt, int offset) > { > + /* These should be kept in sync with pnv */ yes. In that case, the array definition should be moved under target/ppc/. May be under PowerPCCPUClass ? Thanks, C. > uint8_t pa_features_206[] = { 6, 0, > 0xf6, 0x1f, 0xc7, 0x00, 0x00, 0xc0 }; > uint8_t pa_features_207[] = { 24, 0,