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From: Richard Henderson <richard.henderson@linaro.org>
To: Jinjie Ruan <ruanjinjie@huawei.com>,
	peter.maydell@linaro.org, eduardo@habkost.net,
	marcel.apfelbaum@gmail.com, philmd@linaro.org,
	wangyanan55@huawei.com, qemu-devel@nongnu.org,
	qemu-arm@nongnu.org
Subject: Re: [RFC PATCH v5 12/22] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64()
Date: Fri, 1 Mar 2024 07:44:46 -1000	[thread overview]
Message-ID: <1f5627a4-a96a-4548-90bb-97fe13c6ab4a@linaro.org> (raw)
In-Reply-To: <10add4f2-68c5-14df-59d7-f6e27457c8b5@huawei.com>

On 2/29/24 17:42, Jinjie Ruan wrote:
> 
> 
> On 2024/3/1 7:09, Richard Henderson wrote:
>> On 2/29/24 03:10, Jinjie Ruan via wrote:
>>> According to Arm GIC section 4.6.3 Interrupt superpriority, the interrupt
>>> with superpriority is always IRQ, never FIQ, so the NMI exception trap
>>> entry
>>> behave like IRQ. However, VNMI can be IRQ or FIQ, FIQ can only come from
>>> hcrx_el2.HCRX_VFNMI bit, IRQ can be raised from the GIC or come from the
>>> hcrx_el2.HCRX_VINMI bit.
>>>
>>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>>> ---
>>> v4:
>>> - Also handle VNMI in arm_cpu_do_interrupt_aarch64().
>>> v3:
>>> - Remove the FIQ NMI handle.
>>> ---
>>>    target/arm/helper.c | 9 +++++++++
>>>    1 file changed, 9 insertions(+)
>>>
>>> diff --git a/target/arm/helper.c b/target/arm/helper.c
>>> index b796dbdf21..bd34b3506a 100644
>>> --- a/target/arm/helper.c
>>> +++ b/target/arm/helper.c
>>> @@ -11459,12 +11459,21 @@ static void
>>> arm_cpu_do_interrupt_aarch64(CPUState *cs)
>>>            break;
>>>        case EXCP_IRQ:
>>>        case EXCP_VIRQ:
>>> +    case EXCP_NMI:
>>>            addr += 0x80;
>>>            break;
>>>        case EXCP_FIQ:
>>>        case EXCP_VFIQ:
>>>            addr += 0x100;
>>>            break;
>>> +    case EXCP_VNMI:
>>> +        if (env->irq_line_state & CPU_INTERRUPT_VNMI ||
>>> +            env->cp15.hcrx_el2 & HCRX_VINMI) {
>>> +            addr += 0x80;
>>> +        } else if (env->cp15.hcrx_el2 & HCRX_VFNMI) {
>>> +            addr += 0x100;
>>> +        }
>>> +        break;
>>
>> By not combining VFNMI with CPU_INTERRUPT_VNMI, you don't need this
>> complication.
>> Just
>>
>>       case EXCP_IRQ:
>>       case EXCP_VIRQ:
>> +    case EXCP_NMI:
> 
> Not understand it. both VIRQ and VFIQ will set CPU_INTERRUPT_VNMI and
> cause EXCP_VNMI if they have Superpriority, the distinction jump here is
> necessary.

In my comment against patch 5, that's exactly what I said *not* to do.


r~



  reply	other threads:[~2024-03-01 17:45 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-29 13:10 [RFC PATCH v5 00/22] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 01/22] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 02/22] target/arm: Add PSTATE.ALLINT Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 03/22] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 04/22] target/arm: Implement ALLINT MSR (immediate) Jinjie Ruan via
2024-02-29 21:48   ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 05/22] target/arm: Support MSR access to ALLINT Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 06/22] target/arm: Add support for Non-maskable Interrupt Jinjie Ruan via
2024-02-29 22:42   ` Richard Henderson
2024-02-29 23:02   ` Richard Henderson
2024-03-19 17:03     ` Peter Maydell
2024-03-19 18:40       ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 07/22] target/arm: Add support for NMI in arm_phys_excp_target_el() Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 08/22] target/arm: Handle IS/FS in ISR_EL1 for NMI Jinjie Ruan via
2024-02-29 23:05   ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 09/22] target/arm: Handle PSTATE.ALLINT on taking an exception Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 10/22] hw/arm/virt: Wire NMI and VNMI irq lines from GIC to CPU Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 11/22] hw/intc/arm_gicv3: Add external IRQ lines for NMI Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 12/22] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() Jinjie Ruan via
2024-02-29 23:09   ` Richard Henderson
2024-03-01  3:42     ` Jinjie Ruan via
2024-03-01 17:44       ` Richard Henderson [this message]
2024-02-29 13:10 ` [RFC PATCH v5 13/22] hw/intc/arm_gicv3: Add irq superpriority information Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 14/22] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0 Jinjie Ruan via
2024-02-29 23:10   ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 15/22] hw/intc/arm_gicv3: Implement GICD_INMIR Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 16/22] hw/intc: Enable FEAT_GICv3_NMI Feature Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 17/22] hw/intc/arm_gicv3: Add NMI handling CPU interface registers Jinjie Ruan via
2024-02-29 23:32   ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 18/22] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Jinjie Ruan via
2024-02-29 23:50   ` Richard Henderson
2024-03-04 12:18     ` Jinjie Ruan via
2024-03-05  3:58       ` Jinjie Ruan via
2024-03-04 12:59     ` Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 19/22] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() Jinjie Ruan via
2024-03-01  0:22   ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 20/22] hw/intc/arm_gicv3: Report the VNMI interrupt Jinjie Ruan via
2024-02-29 23:20   ` Richard Henderson
2024-02-29 13:10 ` [RFC PATCH v5 21/22] target/arm: Add FEAT_NMI to max Jinjie Ruan via
2024-02-29 13:10 ` [RFC PATCH v5 22/22] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC Jinjie Ruan via

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